IN74LS164D Integral Corp., IN74LS164D Datasheet
IN74LS164D
Manufacturer Part Number
IN74LS164D
Description
8-bit serial-input/parallel-output shift register
Manufacturer
Integral Corp.
Datasheet
1.IN74LS164D.pdf
(4 pages)
8-Bit Serial-Input/Parallel-Output
Shift Register
asynchronous reset. The gated serial inputs (A and B) permit complete
control over incoming data as a low at either (or both) input(s) inhibits
entry of the new data and resets the first flip flop to the low level at the
next clock pulse. A high level input enables the other input which will
then determine the state of the first flip-flop. Data at the serial inputs
may be changed while the clock is high or low, but only information
meeting the setup requirements will be entered clocking occurs or the
low-to-high level transition of the clock input. All inputs are diode-
clamped to minimize transmission-line effects.
This 8-bit shift register features gated serial inputs and an
Gated (Enable/Disable) Serial Inputs
Fully Buffered Clock and Serial Inputs
Asynchronous Clear
LOGIC DIAGRAM
PIN 7 = GND
PIN 14 =V
CC
D = data input
X = don’t care
Q
rising edge at the clock input.
Reset
An
H
H
H
H
L
- Q
Gn
= data shifted from the previous stage on a
Clock
FUNCTION TABLE
Inputs
X
ORDERING INFORMATION
PIN ASSIGNMENT
TECHNICAL DATA
A1 A2
IN74LS164N Plastic
IN74LS164D SOIC
X X
X X
H D
D H
L L
IN74LS164
for all packages
T
A
=0 to 70 C
Q
D Q
D Q
L
L Q
A
no change
Outputs
Q
L ... L
An
An
An
B
... Q
... Q
... Q
... Q
Gn
Gn
Gn
H
1
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IN74LS164D Summary of contents
Page 1
... Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs Asynchronous Clear LOGIC DIAGRAM PIN PIN 7 = GND TECHNICAL DATA IN74LS164 ORDERING INFORMATION IN74LS164N Plastic IN74LS164D SOIC for all packages PIN ASSIGNMENT FUNCTION TABLE Inputs Reset Clock A1 A2 ...
Page 2
IN74LS164 * MAXIMUM RATINGS Symbol V Supply Voltage CC V Input Voltage IN V Output Voltage OUT Tstg Storage Temperature Range * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted ...
Page 3
AC ELECTRICAL CHARACTERISTICS ns 6.0 ns) f Symbol t Propagation Delay Time, Clock to Q PLH t Propagation Delay Time, Clock to Q PHL t Propagation Delay Time, Reset to Q PHL t Setup Time ...
Page 4
IN74LS164 4 TIMING DIAGRAM ...