AD810AN Analog Devices Inc, AD810AN Datasheet - Page 13

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AD810AN

Manufacturer Part Number
AD810AN
Description
IC CURR-FDBK AMP VIDEO LP 8-DIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD810AN

Slew Rate
1000 V/µs
Mounting Type
Through Hole
Rohs Status
RoHS non-compliant
Applications
Current Feedback
Number Of Circuits
1
-3db Bandwidth
80MHz
Current - Supply
6.8mA
Current - Output / Channel
60mA
Voltage - Supply, Single/dual (±)
5 V ~ 36 V, ±2.5 V ~ 18 V
Package / Case
8-DIP (0.300", 7.62mm)
No. Of Amplifiers
1
Bandwidth
150MHz
Amplifier Case Style
DIP
No. Of Pins
8
Settling Time
125ns
Operating Temperature Max
85°C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD810AN
Manufacturer:
AD
Quantity:
5 510
Part Number:
AD810AN
Manufacturer:
ADI/亚德诺
Quantity:
20 000
REV. A
of the disable the disable pin for 5 V supplies. If driven by
complementary output CMOS logic (such as the 74HC04), the
disable time (until the output goes high impedance) is about
100 ns and the enable time (to low impedance output) is about
170 ns on 5 V supplies. The enable time can be extended to
about 750 ns by using open drain logic such as the 74HC05.
When operated on 15 V supplies, the AD810 disable pin may
be driven by open drain logic such as the 74C906. In this case,
adding a 10 k pull-up resistor from the disable pin to the plus
supply will decrease the enable time to about 150 ns. If there is
a nonzero voltage present on the amplifier's output at the time it
is switched to the disabled state, some additional decay time will
be required for the output voltage to relax to zero. The total
time for the output to go to zero will generally be about 250 ns
and is somewhat dependent on the load impedance.
OPERATION AS A VIDEO LINE DRIVER
The AD810 is designed to offer outstanding performance at
closed-loop gains of one or greater. At a gain of 2, the AD810
makes an excellent video line driver. The low differential gain
and phase errors and wide –0.1 dB bandwidth are nearly
independent of supply voltage and load (as seen in Figures 49
and 50).
Figure 47. A Video Line Driver Operating at a Gain of +2
Figure 48. Closed-Loop Gain and Phase vs. Frequency,
G = +2, R
V
IN
–3
–4
–5
–2
–1
0
1
1
CABLE
75
L
= 150, R
715
75
PHASE
GAIN
3
3
2
V
F
10
S
= 715
AD810
= ±15V
FREQUENCY – MHz
±2.5V
+V
–V
715
7
4
±5V
S
S
0.1µF
0.1µF
6
100
75
R
GAIN = +2
L
= 150
CABLE
V
±2.5V
±5V
S
75
= ±15V
1000
75
0
–45
–90
–135
–180
–225
–270
V
OUT
–13–
Figure 49. Differential Gain and Phase vs. Supply Voltage
Figure 50. Fine-Scale Gain (Normalized) vs. Frequency
for Various Supply Voltages, Gain = +2, R
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
Figure 51. –3 dB Bandwidth vs. Supply Voltage,
Gain = +2, R
+0.1
0
+0.1
–0.1
–0.1
110
100
5
0
0
90
80
70
60
50
40
30
20
100k
G = +2
R
6
V
L
O
= 150
= 250mV p-p
2
GAIN
7
L
4
= 150
SUPPLY VOLTAGE – ± Volts
8
SUPPLY VOLTAGE - ±Volts
R
6
1M
L
9
= 150
R
R
FREQUENCY – Hz
L
F
= 1k
8
= 500
10
R
PHASE
F
10
= 750
GAIN = +2
R
R
f
100 IRE
MODULATED RAMP
C
F
L
11
R
= 715
= 3.58MHz
= 150
F
±2.5
12
PEAKING
= 1k
±2.5
10M
12
PEAKING
14
13
F
1.0dB
16
= 715
AD810
14
±15V
±5V
0.1dB
±5V
±15V
18
15
100M
0.16
0.08
0.02
0.20
0.14
0.12
0.10
0.06
0.04
0
0.18

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