AN294 Silicon_Laboratories, AN294 Datasheet

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AN294

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AN294
Description
Manufacturer
Silicon_Laboratories
Datasheet

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Relevant Devices
This application note applies to the Si8250/1/2 Digital Power Controller and Silicon Laboratories Single-phase POL
Reference Design.
1. Introduction
The Frequency Compensation Simulator (FCS) enables the user to easily design and optimize closed-loop
frequency compensation for buck converters based on the Silicon Labs Si8250 digital power controller. The FCS
simulates both the controller and power stages providing a single simulation of the entire system. The intuitive user
interface generates frequency response gain and phase graphs, and automatically generates filter coefficient
values for the Si8250 in both decimal and hex formats.
2. Features
3. User Interface
The default FCS GUIs are shown in Figures 1 and 2. The Bode Plot GUI of Figure 1 illustrates the closed-loop
magnitude and phase response for the Si8250-based buck converter. This GUI displays the response plots with
loop bandwidth, and gain and phase margin data in real time, and includes a cursor function to facilitate plot
measurement at any point. The Real Time Compensation data entry GUI shown in Figure 2 consists of multiple
user interfaces, each with its own selection tab (the Setup GUI is shown). The user specifies power stage and
controller parameters using this set of GUIs. (For example: power stage parameters such as output filter L and C
values; Si8250 control parameters such as ADC LSB size and sampling frequency, PWM frequency, etc).
Rev. 0.1 7/06
I G I TA L
System compensation design and optimization in a single intuitive simulation environment.
Directly generates compensation loop filter coefficients for the Si8250 digital controller.
Greatly reduces design and system verification time.
X
F
B
R E Q U E N C Y
U C K
C
O N V E R T E R S
Copyright © 2006 by Silicon Laboratories
C
Figure 1. Default Bode Plot GUI
O M P E N S A T I O N
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I M U L A T O R
F
AN294
O R
AN294

Related parts for AN294

AN294 Summary of contents

Page 1

... GUIs. (For example: power stage parameters such as output filter L and C values; Si8250 control parameters such as ADC LSB size and sampling frequency, PWM frequency, etc). Rev. 0.1 7/ Figure 1. Default Bode Plot GUI Copyright © 2006 by Silicon Laboratories AN294 AN294 ...

Page 2

... AN294 3.1. Setup GUI The Setup GUI of Figure 2 allows the user to specify the top-level configuration of the system to be simulated. The Power Stage block represents the power circuits of a single or multiphase buck converter. The Delay block represents the unit delay (nS) through the power stages due to driver propagation delay and other factors. The Gain block (immediately following the Delay block) represents additional gain due to an external amplifier or other gain source. Each of these three blocks can be included in the simulation by " ...

Page 3

... For instance, an equivalent two-phase design would include two equally sized inductors whose values are one-half that of a single-phase design. To model this, both the inductor's DCR and L values need to be adjusted accordingly. All other parameters in the model remain the same. Figure 3. Power Stage GUI Rev. 0.1 AN294 3 ...

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... AN294 3.3. ADC1 GUI The ADC1 GUI (Figure 4) allows the user to specify the sampling rate (in MHz) and the LSB size (in mV). information on the operation of ADC1, please refer to the ADC1 chapter of the Si8250 Users Manual. 4 Figure 4. ADC1 GUI Rev. 0.1 For ...

Page 5

... Bode Plot display GUI until the desired frequency response is achieved. An example design exercise appears in "5. Using the FCS" on page 11. Figure 5. PID/Filter GUI Rev. 0.1 AN294 5 ...

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... AN294 3.5. DPWM GUI The Si8250 contains a digital PWM modulator (DPWM) the output of which moves in discrete time steps. The maximum number of time steps for any given switching cycle is 511. The SW_CYC field in the DPWM GUI (Figure 6) allows the user to specify the number of DPWM time steps per switching cycle. (For more information on DPWM operation, please see the DPWM chapter of the Si8250 Users Manual ...

Page 7

... ADC1). The user must also specify any external gain (such as an external amplifier) and the power stage group delay (propagation delay of the gate drivers plus turn-on delay of the transistors, plus other external sources of delay) for maximum simulation accuracy. Figure 7. Feedback GUI Rev. 0.1 AN294 7 ...

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... AN294 3.7. Utilities GUI The Utilities GUI (Figure 8) provides the means to adjust the scale of the frequency plots that appear in the Bode Plot GUI. For instance, modifying the Gain Plot Scale button from increases the amplitude of the plot in the Bode Plot GUI by 2. The Gain Plot Offset button shifts the Gain Plot up or down. This can be very useful when skewing sections of the plot for more detailed information ...

Page 9

... Once the area is chosen, release the left mouse button and the area will be zoomed. Note that multiple zooms into an area can be implemented. To return to the original non-zoomed Bode Plot GUI, click the left mouse button anywhere in the Bode Plot GUI. Cursors Rev. 0.1 AN294 9 ...

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... AN294 10 Figure 10. Zooming Rev. 0.1 ...

Page 11

... Output caps: 410 F ±20% (Capacitor ESR: 1.25 mΩ) RDS(on): 2.5 mΩ The desired frequency response is: Loop Bandwidth: 35 kHz Phase margin: 45 deg 5.1. Configuring the GUIs Launch the FCS and edit the data in each GUI to match the settings shown in Figures 11–16. Figure 11. Set-up GUI Figure 12. Power Stage GUI Rev. 0.1 AN294 11 ...

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... AN294 Figure 13. ADC1 GUI Figure 15. DPWM GUI 12 Figure 14. PID/Filter GUI Figure 16. Feedback GUI Rev. 0.1 ...

Page 13

... Hz with a phase margin (PM) of 38.58 degrees. The parameters in the PID/Filter GUI will be adjusted to achieve the target response of 35 KHz and 45 degrees phase margin. F DPWM ---------------------------------------------- - F = switch ÷ SW_CYC[8:0] 1 Equation 1. DPWM Switching Frequency Figure 17. Power Stage Effects Rev. 0.1 AN294 6 x 8/40). The default settings for 13 ...

Page 14

... AN294 5.2. Filter Coefficients As configured for this design, the Si825x DSP filter engine has a first-stage PID filter, followed by a second stage two-pole low pass filter (LPF). The PID filter has three coefficients: kp, ki, and kd. For more information on the operation of these parameters, please see Application Note “AN259: Designing with the Si825x Digital Power Controller" ...

Page 15

... Although Figure 18 shows the frequency response for the entire closed-loop system, other aspects of the simulation can be observed separately. For example, the open-loop frequency response of just the PID filter can be observed by simply "unchecking" the other system blocks as shown in Figure 19. The resulting response of only the PID filter is shown in Figure 20. Rev. 0.1 AN294 15 ...

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... AN294 Figure 19. Observing PID Filter Response 16 Figure 20. PID Filter Response Rev. 0.1 ...

Page 17

... Note: Under load and over temperature, the output capacitors typically lose 20 percent of their rated value. Therefore, the nominal 410 µF output caps modeled here can easily drop to 328 µF or less. The FCS can be used to simulate these and various other effects. POL R D EFERENCE POL Power Efficiency(FW=380 kHz) 0 Output current Rev. 0.1 AN294 S ESIGN PECIFICATIONS 20 17 ...

Page 18

... AN294 Non-Linear Control The measured loop frequency response of the Si825x Single-phase POL Reference Design is shown in Figure 22. Figure 22. POL Loop Frequency Response Measured with Network Analyzer Different filter coefficients are brought into play during system operation, depending on load conditions. The "steady-state" PID coefficients for the Si825x Single-phase POL reference design are kp = 0x0B 0x01 0x18 0xB3 0x2E 0x28. A set of " ...

Page 19

... Figure 23. Non linear Control Kernel Algorithm Figure 24. Transient Response with Load Step from 25% to 50%, di/dt 2.5 A/us Rev. 0.1 AN294 19 ...

Page 20

... AN294 R D ELEVANT OCUMENTS Si825x Data Sheet Si825x Users Manual Application Note 259: "Designing with the Si8250 Digital Power Controller" Application Note 271: "Si8250 Real-time Kernel Overview" 20 Rev. 0.1 ...

Page 21

... N : OTES Rev. 0.1 AN294 21 ...

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... AN294 C I ONTACT NFORMATION Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: powerproducts@silabs.com www.silabs.com Internet: The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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