ISL59830IAZ-T7 Intersil, ISL59830IAZ-T7 Datasheet
ISL59830IAZ-T7
Specifications of ISL59830IAZ-T7
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ISL59830IAZ-T7 Summary of contents
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... ISL59830IA-T7 59830IA 7” ISL59830IA-T13 59830IA 13” ISL59830IAZ 59830IAZ - (See Note) ISL59830IAZ-T7 59830IAZ 7” (See Note) ISL59830IAZ-T13 59830IAZ 13” (See Note) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Absolute Maximum Ratings ( Supply Voltage between V and GND . . . . . . . . . . . . . . . . . ...
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Pin Descriptions PIN NUMBER PIN NAME 1 RIN 2 GIN 3 BIN 4 REF 5 VEE 6 GND 7 VEE OUT 8 DGND 9 DVCC 10 NC 11, 13 VCC ISL59830 PIN FUNCTION Analog input Analog input ...
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Pin Descriptions (Continued) PIN NUMBER PIN NAME 14 BOUT 15 GOUT 16 ROUT Typical Performance Curves =0pF 1kΩ 150Ω -2 75Ω 10M FREQUENCY (Hz) FIGURE 1. GAIN vs ...
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Typical Performance Curves 1.6 1.2 0.8 0.4 0 2.2 2.4 2.6 2.8 3 3.2 SUPPLY VOLTAGE (V) FIGURE 5. PEAKING vs SUPPLY VOLTAGE - =500Ω -30 L -40 -50 -60 -70 -80 -90 -100 100K 1M ...
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Typical Performance Curves 100 10 1 0.1 0.01 10K 100K 1M FREQUENCY (Hz) FIGURE 11. OUTPUT IMPEDANCE vs FREQUENCY 1K 100 10 1 0.1 10 100 1K 10K FREQUENCY (Hz) FIGURE 13. VOLTAGE AND CURRENT NOISE vs FREQUENCY -30 -40 ...
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Typical Performance Curves 0 -0.02 -0.04 -0.06 -0.08 IRE FIGURE 17. DIFFERENTIAL PHASE TIME (200ns/DIV) FIGURE 19. ENABLE TIME TIME (10ns/DIV) FIGURE 21. LARGE SIGNAL RISE & FALL TIMES 7 ISL59830 (Continued) FIGURE 20. SMALL SIGNAL RISE & FALL TIMES ...
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Typical Performance Curves 3.25 3 2.75 2.5 50 250 450 650 LOAD RESISTANCE (Ω) FIGURE 23. MAXIMUM OUTPUT MAGNITUDE vs LOAD RESISTANCE JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 1.2 1 791mW 0.8 0.6 0.4 0 ...
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ISL59830 + DC-Restore Solution 2kΩ 2kΩ 75Ω 75Ω 0.1µF 0.1µ 0.1µF 0.1µF 5 75Ω 75Ω C 0.1µF 0.1µF 6 ...
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Demo Board Schematic RED_IN R 1 75Ω GREEN_IN R 2 75Ω BLUE_IN 1.0µF 75Ω 499Ω 1kΩ REFERENCE CONTROL Description of Operation and Application Information Theory Of Operation The ...
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BIAS exponentially modulated by the magnitude of the open loop gain, output impedance increases with frequency as the open loop gain decreases with frequency. This inductive-like effect of the output impedance is countered in ...
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The V Pin REF Applying a voltage to the V pin simply places that REF voltage on what would usually be the ground side of the gain resistor of the amplifier, resulting in a DC-level shift of the output signal. ...
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EN pin. The applied logic signal is relative to GND pin. Letting the EN pin float or applying a signal that is less than 0.8V above GND will enable the amplifier. The amplifier will be disabled when the signal ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...