WM9707 Wolfson Microelectronics plc, WM9707 Datasheet
WM9707
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WM9707 Summary of contents
Page 1
... SPDIF output. WM9707 is interchangeable with AC’97 CODECs from Wolfson and other suppliers. The WM9707 is fully operable on 3. mixed 3.3/5V supplies, and is packaged in the industry standard 48-lead TQFP package with 7mm body size. ...
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... WM9707 DESCRIPTION ....................................................................................................... 1 AC’97 FEATURES ................................................................................................. 1 BLOCK DIAGRAM ................................................................................................. 1 TABLE OF CONTENTS ......................................................................................... 2 PIN CONFIGURATION ........................................................................................... 3 ORDERING INFORMATION .................................................................................. 3 ABSOLUTE MAXIMUM RATINGS ......................................................................... 4 RECOMMENDED OPERATING CONDITIONS ..................................................... 5 ELECTRICAL CHARACTERISTICS ...................................................................... 5 PIN DESCRIPTION ................................................................................................ 8 DETAILED TIMING DIAGRAMS ............................................................................ 9 AC-LINK LOW POWER MODE ...................................................................................... 9 COLD RESET ................................................................................................................ 9 WARM RESET ............................................................................................................. 10 CLOCK SPECIFICATIONS .......................................................................................... 10 DATA SETUP AND HOLD (50PF EXTERNAL LOAD) ................................................. 11 SIGNAL RISE AND FALL TIMES ...
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... BITCLK 6 DVSS2 7 8 SDATIN 9 DVDD2 10 SYNC RESETB 11 PCBEEP ORDERING INFORMATION TEMPERATURE DEVICE RANGE o WM9707SCFT/V -40 to +85 o WM9707SCFT/RV -40 to +85 Note: Reel quantity = 2,200 LINEOUTR 35 LINEOUTL 34 CX3D2 33 CX3D1 32 CAP2 VREFOUT 27 VREF 26 AVSS1 25 AVDD1 ...
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... WM9707 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process therefore generically susceptible to damage from excessive static voltages ...
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... WM9707 RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range Analogue supply range Digital ground Analogue ground Difference DVSS to AVSS Analogue supply current Digital supply current Standby supply current (all PRs set) Analogue supply current Digital supply current Standby supply current (all PRs set) Note: 1 ...
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... WM9707 Test Characteristics: AVDD = 5.0V, DVDD = 3.3V; Ambient Temperature +25 PARAMETER DAC Circuit Specifications (AVDD = 5V) 48kHz sampling SNR A-weighted (Note 1) Full scale output voltage THD Frequency response Transition band Stop band Out of band rejection Spurious tone reduction PSRR ADC Circuit Specifications (AVDD = 5V) 48kHz sampling ...
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... WM9707 Test Characteristics: AVDD = 5.0V, DVDD = 3.3V; Ambient Temperature +25 PARAMETER ADC Circuit Specifications (AVDD = 3.3V) 48kHz sampling SNR A-weighted (Note 1) ADC input for full scale output THD Frequency response Transition band Stop band Stop band rejection PSRR Mixer Circuit Specifications (AVDD = 3.3V) 48kHz sampling ...
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... WM9707 PIN DESCRIPTION PIN NAME 1 DVDD1 2 XTLIN 3 XTLOUT DVSS1 4 SDATAOUT 5 6 BITCLK 7 DVSS2 8 SDATAIN 9 DVDD2 10 SYNC 11 RESETB PCBEEP 12 13 PHONE 14 AUXL 15 AUXR 16 VIDEOL 17 VIDEOR CDL 18 19 CDGND CDR 20 21 MIC1 22 MIC2 23 LINEINL 24 LINEINR 25 AVDD1 AVSS1 26 VREF 27 28 VREFOUT ...
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... WM9707 DETAILED TIMING DIAGRAMS Test Characteristics: AVDD = 5.0V, DVDD = 3.3V; Ambient Temperature +25 All measurements are taken at 10% to 90% VDD, unless otherwise stated. All the following timing information is guaranteed, not tested. AC-LINK LOW POWER MODE BITCLK SDATAOUT SDATAIN Figure 1 AC-Link Powerdown Timing PARAMETER ...
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... WM9707 WARM RESET BITCLK Figure 3 Warm Reset Timing SYNC active high pulse width SYNC inactive to BITCLK startup delay CLOCK SPECIFICATIONS BITCLK Figure 4 Clock Specifications (50pF External Load) Note: Worst case duty cycle restricted to 40/60. PARAMETER BITCLK frequency BITCLK period BITCLK output jitter ...
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... WM9707 DATA SETUP AND HOLD (50pF EXTERNAL LOAD) BITCLK SDATAOUT Figure 5 Data Setup and Hold (50pF External Load) Note: Setup and hold time parameters for SDATAIN are with respect to AC’97 Controller. PARAMETER Setup to falling edge of BITCLK Hold from falling edge of BITCLK ...
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... WM9707 SYSTEM INFORMATION Figure 7 Functional Block Diagram w Production Data PD, Rev 4.4, March 2009 12 ...
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... WM9707 MIC2 22 RESET 11 AC'97 BITCLK 6 DIGITAL SYNC 10 CONTROLLER SDATAIN 8 SDATAOUT 5 45 CID Figure 8 Revision 2.1 Compliant 2-Channel CODEC Figure 9 WM9707 Channel System w CD, VIDEO, AUX, LINEINL/R MIC1 PCBEEP PHONE WM9707 37 48 AUDIO SPDIF TRANSFORMER CIRCUIT Production Data LINEOUTL/R { LNLVLOUTL/R ...
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... WM9707 SDATAIN SYNC RESETB If pin CID is not driven then CODEC ID NOTEBOOK/ defaults to 0. When docked CID is pulled low making LAPTOP CODEC a 'slave' (1) stopping BITCLK Figure 10 WM9707 in a Docking Station System w LINEOUTL SDATAOUT BITCLK WM9707 SDATAIN SYNC RESETB LINEOUTR ID=0 DOCKING STATION ID=0 PD, Rev 4.4, March 2009 ...
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... DAC, 16-bit words will be downloaded into the CODEC from the controller, along with padding make the 16-bit word up to 20-bit length. In this case, the WM9707 will process the 16-bit word along with 0 padding bits in the 2 LSB locations (to make 18-bit). At the ADC output, WM9707 will provide an 18-bit word, again with 0s in the two LSB locations (20-bit). The AC’ ...
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... WM9707 There is no provision for pseudo-stereo effects. Mono signals will have no enhancement applied (if the signals are in phase and of the same amplitude). Signals from the PCM DAC channels can have stereo enhancement applied. It can also be bypassed if desired. This control is enabled by setting the POP bit in Register 20h. ...
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... NC Ground Table 3 ID Selection CONTROL INTERFACE A digital interface has been provided to control the WM9707 and transfer data to and from it. This serial interface is compatible with the Intel AC’97. The main control interface functions are: • Control of analogue gain and signal paths through the mixer • ...
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... SYNC is low is defined as the Data Phase. Additionally, for power savings, all clock, sync, and data signals can be halted. This requires that the WM9707 be implemented as a static design to allow its register contents to remain intact when entering a power savings mode. ...
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... Within slot 0 the first bit is a global bit (SDATAOUT slot 0, bit 15) which flags the validity for the entire audio frame. If the Valid Frame bit this indicates that the current audio frame contains at least one time slot of valid data. The next 12-bit positions sampled by the WM9707 indicate which of the corresponding 12 time slots contain valid data. ...
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... SLOT 5: OPTIONAL MODEM LINE CODEC Audio output frame slot 5 contains the MSB justified modem DAC input data. This optional AC’97 feature is not supported in the WM9707, and if data is written to this location it is ignored. This may be determined by the AC’97 controller interrogating the WM9707 Vendor ID registers. ...
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... Slot special reserved time slot containing 16-bits, which are used for AC-link protocol infrastructure. Within slot 0 the first bit is a global bit (SDATAIN slot 0, bit 15) which flags whether the WM9707 is in the CODEC Ready state or not. If the CODEC Ready bit this indicates that the WM9707 is not ready for normal operation. This condition is normal following the desertion of power on reset for example, while the WM9707’ ...
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... The status data port delivers 16-bit control register read data. Bit (19:4) Bit (3:0) If slot 2 is tagged invalid by the WM9707, then the entire slot will be stuffed with 0s by the WM9707. SLOT 3: PCM RECORD LEFT CHANNEL Audio input frame slot 3 is the left channel output of the WM9707’s input Mux, post-ADC. ...
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... The AC’97 controller should also drive SYNC and SDATAOUT low after programming the WM9707 to this low power, halted mode. Once the WM9707 has been instructed to halt BITCLK, a special wake up protocol must be used to bring the AC-link to the active mode since normal audio output and input frames can not be communicated in the absence of BITCLK ...
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... Support for the MSB of the volume level is not provided by the WM9707. If the MSB is written to, then the WM9707 detects when that bit is set and sets all 4 LSBs to 1s. Example: If the driver writes a 1xxxxx the WM9707 interprets that as x11111. It will also respond when read with x11111 rather than 1xxxxx, the value written to it ...
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... The MSB of the register is the mute bit. When this bit is set to 1 the level for that channel is set at - WM9707 defaults to the PC-beep path being muted, except during reset when the path is open external speaker should be provided within the PC to alert the user to power on self-test problems ...
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... Below is a summary of each bit and its function. Only the 3D, MIX, MS and LPBK bits are supported by the WM9707. The MS bit controls the Mic selector. The LPBK bit enables loopback of the ADC output to the DAC input without involving the AC-link, allowing for full system performance measurements ...
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... Figure 16 illustrates one example procedure complete Powerdown of the WM9707. From normal operation sequential writes to the Powerdown Register are performed to Powerdown the WM9707 a piece at a time. After everything has been shut off (PR0 to PR3 set), a final write (of PR4) can be executed to shut down the WM9707’s digital interface (AC-link). ...
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... The part will remain in sleep mode with all its registers holding their static values. To wake up the WM9707, the AC’97 controller will send a pulse on the sync line issuing a warm reset. This will restart the WM9707’s digital interface (resetting PR4 to 0). The WM9707 can also be woken up with a cold reset ...
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... Additionally, a bit SCMS in Register 5Ch may also be set, which sets the copyright flag in the IEC958 data, allowing serial copy protect mechanisms to be removed. The WM9707 can be programmed to automute the DACs. By setting the mute bit, the WM9707 will mute the DACs when it detects a continuous sequence of 1024 zeros. Register 5Ch contains four vendor specific control bits ...
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... Play Vendor ID code. The first character of that F0, the second character S7 to S0, and the third T7 to T0. These three characters are ASCII encoded. The REV7 to REV0 field is for the Vendor Revision number. In the WM9707 the vendor ID is set to WML3. Wolfson is a registered Microsoft Plug and Play vendor. ...
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... WM9707 SERIAL INTERFACE REGISTER MAP The following table shows the function and address of the various control bits that are loaded through the serial interface during write operations. Reg Name D15 D14 D13 00h Reset X SE4 SE3 02h Master volume Mute X 04h ...
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... SLAVE SELECT AVSS AC-LINK Notes C24 should be as close to WM9707 as possible. 2. AGND and DGND should be connected as close to WM9707 as possible required if driving pin 44 from external control logic. R1 not required when pin 44 is tied directly to DVDD or DVSS. Figure 18 External Components Diagram w ...
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... WM9707 RECOMMENDED EXTERNAL COMPONENTS VALUES COMPONENT SUGGESTED REFERENCE VALUE 100nF C5 to C17 470nF C18 1μF C19 0.1μF C20 10μF C21 0.1μF C22 10μF C23 100nF C24 47nF C25 to C29 10μF C30 and C31 22pF R1 1kΩ XT 24.576 MHz Table 18 External Component Values Figure 19 Suggested SPDIF Output Circuit (DVDD = 5V) RECOMMENDATIONS FOR 3 ...
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... WM9707 PACKAGE DIMENSIONS FT: 48 PIN TQFP ( 1.4 mm Dimensions Symbols (mm) MIN NOM A ----- ----- A 0.05 ----- 1 A 1.35 1. 0.17 0.22 c 0.09 ----- D 9.00 BSC D 7.00 BSC 1 E 9.00 BSC E 7.00 BSC 1 e 0.50 BSC L 0.45 0.60 o θ 0 3.5 Tolerances of Form and Position ccc 0.08 REF: JEDEC.95, MS-026 NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS. ...
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... WM9707 IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...