P3055LD NIKO, P3055LD Datasheet

no-image

P3055LD

Manufacturer Part Number
P3055LD
Description
25V; 12A N-channel logic level enhancement mode field effect transistor
Manufacturer
NIKO
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P3055LD
Manufacturer:
NIKO
Quantity:
250
Part Number:
P3055LD
Manufacturer:
NIKO
Quantity:
5 519
Part Number:
P3055LDG
Manufacturer:
NIKOS
Quantity:
55 000
Part Number:
P3055LDG
Manufacturer:
NIKOS
Quantity:
20 000
NIKO-SEM
ABSOLUTE MAXIMUM RATINGS (T
THERMAL RESISTANCE RATINGS
1
2
ELECTRICAL CHARACTERISTICS (T
PRODUCT SUMMARY
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
Gate-Source Voltage
Pulsed Drain Current
Operating Junction & Storage Temperature Range
Lead Temperature (
Continuous Drain Current
Avalanche Energy
Repetitive Avalanche Energy
Power Dissipation
Junction-to-Case
Junction-to-Ambient
Case-to-Heatsink
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V
(BR)DSS
25
THERMAL RESISTANCE
PARAMETER
PARAMETERS/TEST CONDITIONS
R
50mΩ
DS(ON)
1
/
1
16
” from case for 10 sec.)
N-Channel Logic Level Enhancement
2
12A
I
D
Mode Field Effect Transistor
C
SYMBOL
= 25 °C Unless Otherwise Noted)
C
V
= 25 °C, Unless Otherwise Noted)
V
(BR)DSS
I
I
GS(th)
GSS
DSS
T
T
L = 0.1mH
L = 0.05mH
T
T
C
C
C
C
SYMBOL
= 25 °C
= 100 °C
= 25 °C
= 100 °C
G
R
R
R
θCS
θJC
θJA
V
STATIC
DS
= 20V, V
1
V
V
TEST CONDITIONS
V
V
S
DS
DS
D
GS
DS
= V
= 0V, V
= 0V, I
= 20V, V
GS
TYPICAL
GS
SYMBOL
, I
= 0V, T
T
D
1
D
GS
V
E
E
j
I
, T
P
T
= 250µA
I
DM
= 250µA
GS
D
AS
AR
GS
D
L
= ±20V
stg
= 0V
J
= 125 °C
MAXIMUM
-55 to 150
75
MIN TYP MAX
3
LIMITS
0.8
25
±20
275
12
45
60
48
20
8
3
LIMITS
1.2
TO-252 (DPAK)
P3055LD
DEC-01-2001
±250 nA
1. GATE
2. DRAIN
3. SOURCE
250
2.5
25
UNITS
°C / W
UNITS
UNIT
mJ
°C
µA
W
V
A
V

Related parts for P3055LD

P3055LD Summary of contents

Page 1

... Unless Otherwise Noted) C SYMBOL TEST CONDITIONS STATIC 0V, I (BR)DSS GS(th 0V, V GSS 20V DSS V = 20V P3055LD TO-252 (DPAK) SYMBOL LIMITS V ± -55 to 150 j stg T 275 ...

Page 2

... Peak Reverse Recovery Current Reverse Recovery Charge 1 Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%. 2 Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P3055LD”, DATE CODE or LOT # Mode Field Effect Transistor 10V, V D(ON ...

Page 3

... N-Channel Logic Level Enhancement NIKO-SEM Mode Field Effect Transistor 3 P3055LD TO-252 (DPAK) DEC-01-2001 ...

Page 4

... N-Channel Logic Level Enhancement NIKO-SEM TO-252 (DPAK) MECHANICAL DATA Dimension Min. A 9.35 B 2.20 C 0.48 D 0.89 E 0.45 F 0.03 G 5.20 Mode Field Effect Transistor mm Dimension Typ. Max. 10.10 H 2.40 I 0.85 J 1.50 K 0.60 L 0. P3055LD TO-252 (DPAK) mm Min. Typ. Max. 0.80 6.40 6.60 5.00 5.50 0.55 1.10 0.60 1.00 4.40 4.60 DEC-01-2001 ...

Related keywords