DS3514T+ Maxim Integrated Products, DS3514T+ Datasheet - Page 18
![IC I2C GAMMA/VCOM BUFF 48-TQFN](/photos/6/50/65028/48-qfn_21-0141_sml.jpg)
DS3514T+
Manufacturer Part Number
DS3514T+
Description
IC I2C GAMMA/VCOM BUFF 48-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3514TTR.pdf
(21 pages)
Specifications of DS3514T+
Applications
TFT-LCD Panels: Gamma Buffer, VCOM Driver
Output Type
Rail-to-Rail
Number Of Circuits
14
Current - Supply
5mA
Current - Output / Channel
4mA
Voltage - Supply, Single/dual (±)
9 V ~ 15 V
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
I
Writing a single byte to a slave: The master must gen-
erate a START condition, write the slave address byte
(R/W = 0), write the memory address, write the byte of
data, and generate a STOP condition. Remember the
master must read the slave’s acknowledgment during
all byte-write operations.
When writing to the DS3514 (and if LD = 1), the DAC
adjusts to the new setting once it has acknowledged the
new data that is being written, and the EEPROM (used to
make the setting nonvolatile) is written following the
STOP condition at the end of the write command.
Writing multiple bytes to a slave: To write multiple
bytes to a slave in one transaction, the master gener-
ates a START condition, writes the slave address byte
(R/W = 0), writes the memory address, writes up to 8
data bytes, and generates a STOP condition. The
DS3514 can write 1 to 8 bytes (one page or row) in a
single write transaction. This is internally controlled by
an address counter that allows data to be written to
consecutive addresses without transmitting a memory
address before each data byte is sent. The address
counter limits the write to one 8-byte page (one row of
the memory map). The first page begins at address
00h and subsequent pages begin at multiples of 8
(08h, 10h, 18h, etc). Attempts to write to additional
pages of memory without sending a STOP condition
between pages results in the address counter wrap-
ping around to the beginning of the present row. To
prevent address wrapping from occurring, the master
must send a STOP condition at the end of the page,
then wait for the bus-free or EEPROM write time to
elapse. Then the master can generate a new START
condition and write the slave address byte (R/W = 0)
and the first memory address of the next memory row
before continuing to write data.
Acknowledge polling: Any time a EEPROM byte is
written, the DS3514 requires the EEPROM write time
(t
the byte to EEPROM. During the EEPROM write time,
the device does not acknowledge its slave address
because it is busy. It is possible to take advantage of
18
W
2
) after the STOP condition to write the contents of
C Gamma and V
______________________________________________________________________________________
I
2
C Communication
COM
Buffer with EEPROM
this phenomenon by repeatedly addressing the
DS3514, which allows communication to continue as
soon as the DS3514 is ready. The alternative to
acknowledge polling is to wait for a maximum period of
t
EEPROM write cycles: The DS3514’s EEPROM write
cycles are specified in the Nonvolatile Memory
Characteristics table. The specification shown is at
the worst-case temperature (hot) as well as at room
temperature.
Reading a single byte from a slave: Unlike the write
operation that uses the specified memory address
byte to define where the data is to be written, the read
operation occurs at the present value of the memory
address counter. To read a single byte from the slave,
the master generates a START condition, writes the
slave address byte with R/W = 1, reads the data byte
with a NACK to indicate the end of the transfer, and
generates a STOP condition. However, because
requiring the master to keep track of the memory
address counter is impractical, the following method
should be used to perform reads from a specified
memory location.
Manipulating the address counter for reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master gen-
erates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOP condition. Recall that the master must NACK the
last byte to inform the slave that no additional bytes will
be read.
See Figure 6 for I
Reading multiple bytes from a slave: The read opera-
tion can be used to read multiple bytes with a single
transfer. When reading bytes from the slave, the master
simply ACKs the data byte if it desires to read another
byte before terminating the transaction. After the mas-
ter reads the last byte it must NACK to indicate the end
of the transfer and generates a STOP condition.
W
to elapse before attempting to access the device.
2
C communication examples.