AT32UC3B0512 Atmel Corporation, AT32UC3B0512 Datasheet - Page 312

• Manufacturer Part Number: AT32UC3B0512
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0512

• Flash (kbytes): 512 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 21-20. Receiver Status
21.6.4.8
32059L–AVR32–01/2012
Parity
Baud Rate
RXRDY
OVRE
Clock
Read
Write
RHR
RXD
CR
The USART supports five parity modes selected by MR.PAR. The PAR field also enables the
Multidrop mode, see
be a zero if there is an even number of ones in the data character, and if there is an odd number
it will be a one. For odd parity the reverse applies. If space or mark parity is chosen, the parity bit
will always be a zero or one, respectively. See
Table 21-7.
The receiver will report parity errors in CSR.PARE, unless parity is disabled. Writing a one to
CR.RSTSTA will clear CSR.PARE. See
Figure 21-21. Parity Error
Start
Baud Rate
Alphanum
Character
Bit
RXRDY
D0
PARE
Clock
R
Write
A
V
RXD
CR
D1
D2
Parity Bit Examples
Start
D3
Bit
0x41
0x56
0x52
Hex
D4
D0
”Multidrop Mode” on page
D5
D1
D6
D2
0100 0001
0101 0010
0101 0110
D7
D3
Parity
Bin
Bit
D4
Stop
Bit
D5
Start
D6
Bit
Figure
D7
D0
Parity
Odd
Bad
Bit
D1
1
1
0
Table
21-21.
313. If even parity is selected, the parity bit will
Stop
Bit
D2
D3
21-7.
D4
Even
0
0
1
D5
RSTSTA = 1
D6
Parity Mode
D7
Mark
Parity
Bit
1
1
1
Stop
Bit
Space
RSTSTA = 1
0
0
0
None
-
-
-
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