AT32UC3B1128 Atmel Corporation, AT32UC3B1128 Datasheet - Page 328

• Manufacturer Part Number: AT32UC3B1128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B1128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.7.1
Name:
Access Type:
Offset:
Reset Value:
• RTSDIS/RCS: Request to Send Disable/Release SPI Chip Select
• RTSEN/FCS: Request to Send Enable/Force SPI Chip Select
• DTRDIS: Data Terminal Ready Disable
• DTREN: Data Terminal Ready Enable
• RETTO: Rearm Time-out
• RSTNACK: Reset Non Acknowledge
• RSTIT: Reset Iterations
• SENDA: Send Address
32059L–AVR32–01/2012
RETTO
TXDIS
31
23
15
–
–
7
Writing a zero to this bit has no effect.
Writing a one to this bit when USART is not in SPI master mode drives RTS pin high.
Writing a one to this bit when USART is in SPI master mode releases NSS (RTS pin).
Writing a zero to this bit has no effect.
Writing a one to this bit when USART is not in SPI master mode drives RTS low.
Writing a one to this bit when USART is in SPI master mode when;
FCS=0: has no effect.
FCS=1: forces NSS (RTS pin) low, even if USART is not transmitting, in order to address SPI slave devices supporting the
CSAAT Mode (Chip Select Active After Transfer).
Writing a zero to this bit has no effect.
Writing a one to this bit drives DTR pin high.
Writing a zero to this bit has no effect.
Writing a one to this bit drives DTR pin low.
Writing a zero to this bit has no effect.
Writing a one to this bit reloads the time-out counter and clears CSR.TIMEOUT.
Writing a zero to this bit has no effect.
Writing a one to this bit clears CSR.NACK.
Writing a zero to this bit has no effect.
Writing a one to this bit clears CSR.ITER if ISO7816 is enabled in MR.MODE
Writing a zero to this bit has no effect.
Writing a one to this bit will in multidrop mode send the next character written to THR as an address.
Control Register
RSTNACK
TXEN
30
22
14
CR
Write-only
0x0
0x00000000
–
–
6
RXDIS
RSTIT
29
21
13
–
–
5
SENDA
RXEN
28
20
12
–
–
4
RTSDIS/RCS
STTTO
RSTTX
27
19
11
–
3
RTSEN/FCS
STPBRK
RSTRX
26
18
10
–
2
STTBRK
DTRDIS
25
17
–
9
1
–
RSTSTA
DTREN
24
16
–
8
0
–
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