AT32UC3C2512C Atmel Corporation, AT32UC3C2512C Datasheet - Page 229
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AT32UC3C2512C
Manufacturer Part Number
AT32UC3C2512C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C2512C
Flash (kbytes)
512 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C2512C-A2UR
Manufacturer:
YAGEO
Quantity:
60 000
Company:
Part Number:
AT32UC3C2512C-U
Manufacturer:
ATMEL
Quantity:
125
Company:
Part Number:
AT32UC3C2512C-Z2ZR
Manufacturer:
Atmel
Quantity:
1 499
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3C0128C PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
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- Download datasheet (5Mb)
32000D–04/2011
MTSR – Move to System Register
Architecture revision:
Architecture revision1 and higher.
Description
The instruction copies the value in the specified register to the specified system register. Note
that special timing concerns must be considered when operating on the system registers, see
the Implementation Manual for details.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
Some system registers are implementation defined. If writing a system register that does not
exist, or to a register that is read only, the instruction is executed but no registers are updated.
With the exception of accessing the JECR and JOSP system registers, this instruction can only
be executed in a privileged mode. Execution from any other mode will trigger a Privilege Viola-
tion exception. JECR and JOSP can be accessed from all modes with this instruction.
The instruction mtsr JOSP, Rx must be used with care. The programmer must ensure that no
change of flow instruction nor an INCJOSP instruction follows mtsr JOSP, Rx within a number of
instructions. This number of cycles is implementation defined. It should also be noted, that this is
true even if the instructions are not to be executed. For instance the sequence
31
1
15
0
SystemRegister[SystemRegisterAddress << 2] ← Rs;
mtsr
SystemRegisterAddress ∈ {0, 4, 8, ..., 1020}
Q:
V:
N:
Z:
C:
mtsr JOSP, Rx
retj
incjosp
1
0
1
0
SystemRegisterAddress, Rs
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
0
0
0
0
0
0
1
0
8
1
0
7
1
0
System Register Ad-
1
20
1
19
Rs
AVR32
0
16
229
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