AT32UC3C264C Atmel Corporation, AT32UC3C264C Datasheet - Page 111

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AT32UC3C264C

Manufacturer Part Number
AT32UC3C264C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C264C

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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9.3.3
32002F–03/2010
AUX port
Figure 9-4.
The Auxiliary (AUX) port and messaging protocol follow the definitions of the Nexus standard.
This standard allows varying the number of signalling pins. The following configuration is
selected for AVR32UC.
The configuration is based on the presumed needs for bandwidth in a system being traced at
100+ MIPS, balanced against the desire to keep debug pincount low. This configuration can be
changed in future implementations to allow for greater or smaller bandwidth over the AUX port.
The AUX pins may be multiplexed with GPIO in a device. By default, the MCKO, MDO, and
MSEO pins are tristated or used as GPIO, and the Nexus functionality must be explicitly enabled
by the debugger. EVTO, EVTI, and the JTAG pins are always available to the debugger.
If the AUX pins are needed for Nexus functionality in an application, it is recommended not to
use these pins for GPIO purposes, as this can affect the signal integrity required for Nexus
operation.
• 6 data output pins (MDO)
• 2 message start/end output pins (MSEO)
• 1 EVTO pin
• 1 EVTI pin
JTAG TAP controller state diagram.
1
0
Test-Logic-
Run-Test/
Reset
Idle
0
1
1
0
1
Capture-DR
Update-DR
Select-DR
Pause-DR
Exit1-DR
Exit2-DR
Shift-DR
Scan
0
0
1
0
1
1
0
0
0
1
1
1
0
1
Capture-IR
Update-IR
Select-IR
Pause-IR
Exit1-IR
Exit2-IR
Shift-IR
Scan
0
0
1
0
1
1
0
0
0
1
1
AVR32
111

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