AT32UC3C264C Atmel Corporation, AT32UC3C264C Datasheet - Page 264

• Manufacturer Part Number: AT32UC3C264C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C264C

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

264
AVR32
PADDSUBS.{UH/SH} – Packed Halfword Addition and Subtraction with Sat-
uration
Architecture revision:
Architecture revision1 and higher.
Description
Perform an addition and subtraction on the same halfword operands which are selected from the
source registers. The resulting halfwords are saturated to unsigned halfwords (paddsubs.uh) or
signed halfwords (paddsubs.sh) and then packed together in the destination register.
Operation:
I.
II.
Syntax:
I.
II.
Operands:
I,II.
Status Flags:
Opcode:
31
1
15
0
If (Rx-part == t) then operand1 = Rx[31:16] else operand1 = Rx[15:0];
If (Ry-part == t) then operand2 = Ry[31:16] else operand2 = Ry[15:0];
Rd[31:16] ← SATU(ZE(operand1, 17) + ZE(operand2, 17), 16);
Rd[15:0] ← SATSU(ZE(operand1, 17) - ZE(operand2, 17), 16);
If (Rx-part == t) then operand1 = Rx[31:16] else operand1 = Rx[15:0];
If (Ry-part == t) then operand2 = Ry[31:16] else operand2 = Ry[15:0];
Rd[31:16] ← SATS(SE(operand1, 17) + SE(operand2, 17), 16);
Rd[15:0] ← SATS(SE(operand1, 17) - SE(operand2, 17), 16);
paddsubs.uh
paddsubs.sh
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}
Q:
V:
N:
Z:
C:
Format I:
1
0
29
1
1
Flag set if saturation occured in one or more of the partial operations.
Not affected.
Not affected.
Not affected.
Not affected.
28
0
Rd, Rx:<part>, Ry:<part>
Rd, Rx:<part>, Ry:<part>
0
Rx
0
25
1
24
0
0
0
0
6
0
0
5
0
X
4
20
0
Y
3
19
Ry
Rd
32000D–04/2011
0
16