AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 229
AT32UC3L0256
Manufacturer Part Number
AT32UC3L0256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3L0128.pdf
(85 pages)
4.AT32UC3L0128.pdf
(852 pages)
Specifications of AT32UC3L0256
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L0256-D3HR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL
Quantity:
270
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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- Download datasheet (5Mb)
32000D–04/2011
MTSR – Move to System Register
Architecture revision:
Architecture revision1 and higher.
Description
The instruction copies the value in the specified register to the specified system register. Note
that special timing concerns must be considered when operating on the system registers, see
the Implementation Manual for details.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
Some system registers are implementation defined. If writing a system register that does not
exist, or to a register that is read only, the instruction is executed but no registers are updated.
With the exception of accessing the JECR and JOSP system registers, this instruction can only
be executed in a privileged mode. Execution from any other mode will trigger a Privilege Viola-
tion exception. JECR and JOSP can be accessed from all modes with this instruction.
The instruction mtsr JOSP, Rx must be used with care. The programmer must ensure that no
change of flow instruction nor an INCJOSP instruction follows mtsr JOSP, Rx within a number of
instructions. This number of cycles is implementation defined. It should also be noted, that this is
true even if the instructions are not to be executed. For instance the sequence
31
1
15
0
SystemRegister[SystemRegisterAddress << 2] ← Rs;
mtsr
SystemRegisterAddress ∈ {0, 4, 8, ..., 1020}
Q:
V:
N:
Z:
C:
mtsr JOSP, Rx
retj
incjosp
1
0
1
0
SystemRegisterAddress, Rs
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
0
0
0
0
0
0
1
0
8
1
0
7
1
0
System Register Ad-
1
20
1
19
Rs
AVR32
0
16
229
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