AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 349
AT32UC3L0256
Manufacturer Part Number
AT32UC3L0256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3L0128.pdf
(85 pages)
4.AT32UC3L0128.pdf
(852 pages)
Specifications of AT32UC3L0256
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L0256-D3HR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL
Quantity:
270
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3L0128 PDF datasheet #3
- AT32UC3L0128 PDF datasheet #4
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- Download datasheet (5Mb)
32000D–04/2011
STCOND – Store Word Conditionally
Architecture revision:
Architecture revision1 and higher.
Description
The source register is stored to the word memory location referred to by the pointer address if
SREG[L] is set. Also, SREG[L] is copied to SREG[Z] to indicate a success or failure of the oper-
ation. This instruction is used for atomical memory access.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
31
15
1
SREG[Z] ← SREG[L];
If SREG[L]
stcond Rp[disp], Rs
{s , p} ∈ {0, 1, …, 15}
disp ∈ {-32768, -32767, ..., 32767}
Q:
V:
N:
Z:
C:
1
29
1
*(Rp + SE(disp16)) ← Rs;
Not affected.
Not affected.
Not affected.
SREG[Z] ← SREG[L].
Not affected.
28
Rp
25
24
1
disp16
0
1
1
20
1
19
Rs
AVR32
0
16
349
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