AT32UC3L064 Atmel Corporation, AT32UC3L064 Datasheet - Page 214

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AT32UC3L064

Manufacturer Part Number
AT32UC3L064
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3L064

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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214
AVR32
MACWH.D – Multiply Word with Halfword and Accumulate in Doubleword
Architecture revision:
Architecture revision1 and higher.
Description
Multiplies the word and halfword register specified and adds the result to the specified double-
word-register. The halfword register is selected as either the high or low part of Ry. Only the 48
highest of the 64 possible bits in the doubleword accumulator are used. The 16 lowest bits are
cleared.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Example:
31
1
15
0
operand1 = Rx;
If (Ry-part == t) then operand2 = SE(Ry[31:16]) else operand2 = SE(Ry[15:0]);
(Rd+1:Rd)[63:16] ← (operand1 × operand2)[47:0] + (Rd+1:Rd)[63:16];
Rd[15:0] ← 0;
macwh.d Rd, Rx, Ry:<part>
d ∈ {0, 2, …, 14}
{x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}
Q:
V:
N:
Z:
C:
macwh.dR10, R2, R3:bwill perform
(R11:R10)[63:16] ← (R2 × SE(R3[15:0])) + (R11:R10)[63:16]
R10[15:0] ← 0
1
0
29
1
0
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
12
28
0
11
1
Rx
1
25
0
8
24
0
0
7
0
1
0
0
5
0
0
4
Y
20
0
3
19
Ry
Rd
32000D–04/2011
0
16

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