AT89C51CC02 Atmel Corporation, AT89C51CC02 Datasheet - Page 20

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AT89C51CC02

Manufacturer Part Number
AT89C51CC02
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51CC02

Flash (kbytes)
16 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
20
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
0.5
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes

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4
Start the Application
Requests from Host
Answer from Bootloader No answer is returned by the device.
Example
20
Start application with a reset pulse
Start application with a jump at
Command Name
T89C51CC02 UART Bootloader
generation
“address”
The flow described below allows to start the application directly from the bootloader upon a spe-
cific command reception.
Two options are possible:
Start the application with a reset pulse generation (using watchdog).
When the device receives this command the watchdog is enabled and the bootloader enters
a waiting loop until the watchdog resets the device.
Take care that if an external reset chip is used the reset pulse in output may be wrong and in
this case the reset sequence is not correctly executed.
Start the application without reset
A jump at the address 0000h is used to start the application without reset.
Record type
Start Application with reset pulse
Start Application without reset at address 0000h
HOST
BOOTLOADER
HOST
BOOTLOADER
03h
Load Offset
x
: 02 0000 03 03 00 F8
: 02 0000 03 03 00 F8
: 04 0000 03 03 01 00 00 F5
: 04 0000 03 03 01 00 00 F5
Record
Length
02h
04h
Data[0]
03h
Data[1]
00h
01h
Data[2]
-
Address
4223C–CAN–03/08
Data[3]
-

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