AT89C51RD2 Atmel Corporation, AT89C51RD2 Datasheet - Page 58
AT89C51RD2
Manufacturer Part Number
AT89C51RD2
Description
Manufacturer
Atmel Corporation
Specifications of AT89C51RD2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
2
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes
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58
AT89C51RD2/ED2
Table 14-13. BDRCON Register
BDRCON - Baud Rate Control Register (9Bh)
Reset Value = XXX0 0000b
Not bit addressable
Number
Bit
7
-
7
6
5
4
3
2
1
0
Mnemonic
RBCK
TBCK
BRR
SRC
SPD
6
Bit
-
-
-
-
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit
Reserved
The value read from this bit is indeterminate. Do not set this bit
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Baud Rate Run Control bit
Cleared to stop the internal Baud Rate Generator.
Set to start the internal Baud Rate Generator.
Transmission Baud rate Generator Selection bit for UART
Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.
Set to select internal Baud Rate Generator.
Reception Baud Rate Generator Selection bit for UART
Cleared to select Timer 1 or Timer 2 for the Baud Rate Generator.
Set to select internal Baud Rate Generator.
Baud Rate Speed Control bit for UART
Cleared to select the SLOW Baud Rate Generator.
Set to select the FAST Baud Rate Generator.
Baud Rate Source select bit in Mode 0 for UART
Cleared to select F
Set to select the internal Baud Rate Generator for UARTs in mode 0.
5
-
BRR
OSC
4
/12 as the Baud Rate Generator (F
TBCK
3
RBCK
2
CLK PERIPH
SPD
1
/6 in X2 mode).
4235K–8051–05/08
SRC
0