AT89LP2052 Atmel Corporation, AT89LP2052 Datasheet - Page 83

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AT89LP2052

Manufacturer Part Number
AT89LP2052
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89LP2052

Flash (kbytes)
2 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
15
Spi
1
Uart
1
Sram (kbytes)
0.25
Operating Voltage (vcc)
2.4 to 5.5
Timers
2
Isp
SPI
Watchdog
Yes

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24.5
Table 24-4.
Note:
Figure 24-6. Shift Register Mode Timing Waveforms
24.6
24.6.1
Note:
24.6.2
Note:
3547J–MICRO–10/09
Symbol
t
t
t
t
t
XLXL
QVXH
XHQX
XHDX
XHDV
Serial Port Timing: Shift Register Mode
1. The values in this table are valid for V
Test Conditions
1. AC Inputs during testing are driven at V
1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to
WRITE TO SBUF
OUTPUT DATA
AC Testing Input/Output Waveforms
Float Waveforms
INPUT DATA
V
float when 100 mV change from the loaded V
CLEAR RI
Parameter
Serial Port Clock Cycle Time
Output Data Setup to Clock Rising Edge
Output Data Hold after Clock Rising Edge
Input Data Hold after Clock Rising Edge
Input Data Valid to Clock Rising Edge
IH
min. for a logic “1” and V
Serial Port Shift Register Timing Parameters
CLOCK
(1)
VALID
0
IL
max. for a logic “0”.
VALID
CC
1
CC
= 2.4V to 5.5V and Load Capacitance = 80 pF.
(1)
- 0.5V for a logic “1” and 0.45V for a logic “0”. Timing measurements are made at
OH
VALID
/V
OL
2
level occurs.
(1)
VALID
3
VALID
4
AT89LP2052/LP4052
2t
VALID
t
t
CLCL
CLCL
CLCL
Min
5
15
Variable Oscillator
0
-15
-15
-15
VALID
6
Max
VALID
7
Units
µs
ns
ns
ns
ns
83

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