AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 82
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AT90CAN32 Automotive
Manufacturer Part Number
AT90CAN32 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(431 pages)
2.AT90CAN128_AUTOMOTIVE.pdf
(16 pages)
3.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
Specifications of AT90CAN32 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Can
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
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82
AT90CAN32/64/128
Table 9-13
shown in
Table 9-13.
Table 9-14.
Note:
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
1. When enabled, the Two-wire Serial Interface enables Slew-Rate controls on the output pins
Figure 9-5 on page
PD0 and PD1. This is not shown in this table. In addition, spike filters are connected between
the AIO outputs shown in the port figure and the digital logic of the TWI module.
and
Overriding Signals for Alternate Functions PD7..PD4
Overriding Signals for Alternate Functions in PD3..PD0
Table 9-14
PD3/INT3/TXD1
TXEN1
0
TXEN1
1
TXEN1
TXD1
0
INT3 ENABLE
INT3 ENABLE
INT3 INPUT
–
PD7/T0
0
0
0
0
0
0
0
0
0
T0 INPUT
–
relates the alternate functions of Port D to the overriding signals
72.
PD6/T1/RXCAN
RXCANEN
PORTD6 • PUD
RXCANEN
0
0
0
0
0
0
T1 INPUT/RXCAN
–
PD2/INT2/RXD1
RXEN1
PORTD2 • PUD
RXEN1
0
0
0
0
INT2 ENABLE
INT2 ENABLE
INT2 INPUT/RXD1
–
PD5/XCK1/TXCAN
TXCANEN +
0
TXCANEN
1
TXCANEN + UMSEL1
(XCK1 OUTPUT •
UMSEL1 • TXCANEN) +
(TXCAN • TXCANEN)
0
0
0
XCK1 INPUT
–
PD1/INT1/SDA
TWEN
PORTD1 • PUD
0
0
TWEN
SDA_OUT
0
INT1 ENABLE
INT1 ENABLE
INT1 INPUT
SDA INPUT
(1)
PD0/INT0/SCL
TWEN
PORTD0 • PUD
0
0
TWEN
SCL_OUT
0
INT0 ENABLE
INT0 ENABLE
INT0 INPUT
SCL INPUT
7682C–AUTO–04/08
PD4/ICP1
0
0
0
0
0
0
0
0
0
ICP1 INPUT
–
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