AT90PWM216 Atmel Corporation, AT90PWM216 Datasheet - Page 193
AT90PWM216
Manufacturer Part Number
AT90PWM216
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM216
Flash (kbytes)
16 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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18.6
18.6.1
7710F–AVR–09/11
Data Transmission – USART Transmitter
Sending Frames with 5 to 8 Data Bit
The USART Transmitter is enabled by setting the Transmit Enable (TXEN) bit in the UCSRB
Register. When the Transmitter is enabled, the normal port operation of the TxDn pin is overrid-
den by the USART and given the function as the Transmitter’s serial output. The baud rate,
mode of operation and frame format must be set up once before doing any transmissions. If syn-
chronous operation is used, the clock on the XCK pin will be overridden and used as
transmission clock.
A data transmission is initiated by loading the transmit buffer with the data to be transmitted. The
CPU can load the transmit buffer by writing to the UDR I/O location. The buffered data in the
transmit buffer will be moved to the Shift Register when the Shift Register is ready to send a new
frame. The Shift Register is loaded with new data if it is in idle state (no ongoing transmission) or
immediately after the last stop bit of the previous frame is transmitted. When the Shift Register is
loaded with new data, it will transfer one complete frame at the rate given by the Baud Register,
U2X bit or by XCK depending on mode of operation.
The following code examples show a simple USART transmit function based on polling of the
Data Register Empty (UDRE) flag. When using frames with less than eight bits, the most signifi-
cant bits written to the UDR are ignored. The USART has to be initialized before the function can
be used. For the assembly code, the data to be sent is assumed to be stored in Register R16
Note:
The function simply waits for the transmit buffer to be empty by checking the UDRE flag, before
loading it with new data to be transmitted. If the Data Register Empty interrupt is utilized, the
interrupt routine writes the data into the buffer.
Assembly Code Example
C Code Example
TABLE 2.
USART_Transmit:
void USART_Transmit( unsigned char data )
{
}
; Wait for empty transmit buffer
sbis UCSRA,UDRE
rjmp USART_Transmit
; Put data (r16) into buffer, sends the data
sts UDR,r16
ret
/* Wait for empty transmit buffer */
while ( !( UCSRA & (1<<UDRE)) )
/* Put data into buffer, sends the data */
UDR = data;
1. The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
;
(1)
(1)
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