ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 138

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15.11.5
15.11.6
8151H–AVR–02/11
TCCR1C - Timer/Counter1 Control Register C
TCCR3C - Timer/Counter3 Control Register C
• Bit 2:0 – CSn2:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter, see
15-10
Table 15-6.
If external pin modes are used for the Timer/Countern, transitions on the Tn pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
• Bit 7 – FOCnA: Force Output Compare for Channel A
• Bit 6 – FOCnB: Force Output Compare for Channel B
• Bit 5 – FOCnC: Force Output Compare for Channel C
The FOCnA/FOCnB/FOCnC bits are only active when the WGMn3:0 bits specifies a non-PWM
mode. When writing a logical one to the FOCnA/FOCnB/FOCnC bit, an immediate compare
match is forced on the waveform generation unit. The OCnA/OCnB/OCnC output is changed
according to its COMnx1:0 bits setting. Note that the FOCnA/FOCnB/FOCnC bits are imple-
mented as strobes. Therefore it is the value present in the COMnx1:0 bits that determine the
effect of the forced compare.
A FOCnA/FOCnB/FOCnC strobe will not generate any interrupt nor will it clear the timer in Clear
Timer on Compare Match (CTC) mode using OCRnA as TOP.
The FOCnA/FOCnB/FOCnB bits are always read as zero.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CSn2
0
0
0
0
1
1
1
1
and
Figure
CSn1
0
0
1
1
0
0
1
1
Clock Select Bit Description
FOC1A
FOC3A
W
W
7
0
7
0
15-11.
CSn0
FOC3B
FOC1B
0
1
0
1
0
1
0
1
W
W
6
0
6
0
Description
No clock source. (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on Tn pin. Clock on falling edge
External clock source on Tn pin. Clock on rising edge
FOC3C
FOC1C
I/O
I/O
I/O
I/O
I/O
W
W
5
0
5
0
/1 (No prescaling
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R
R
4
–
0
4
–
0
R
R
3
–
0
3
–
0
R
R
2
–
0
2
–
0
ATmega128A
R
R
1
–
0
1
–
0
R
R
0
–
0
0
–
0
TCCR3C
TCCR1C
Figure
138