ATmega162 Atmel Corporation, ATmega162 Datasheet - Page 226

• Manufacturer Part Number: ATmega162
• Manufacturer: Atmel Corporation

Specifications of ATmega162

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 6
• Input Capture Channels: 2
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Preventing Flash
Corruption
226
ATmega162/V
The algorithm for reading the Fuse Low byte is similar to the one described above for reading
the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and set the BLBSET
and SPMEN bits in SPMCR. When an LPM instruction is executed within three cycles after the
BLBSET and SPMEN bits are set in the SPMCR, the value of the Fuse Low byte (FLB) will be
loaded in the destination register as shown below. Refer to
description and mapping of the Fuse Low byte.
Similarly, when reading the Fuse High byte, load 0x0003 in the Z-pointer. When an LPM instruc-
tion is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCR,
the value of the Fuse High byte (FHB) will be loaded in the destination register as shown below.
Refer to
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an LPM instruction
is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCR, the
value of the Extended Fuse byte (EFB) will be loaded in the destination register as shown below.
Refer to
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot Loader Lock
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down sleep mode during periods of low V
Bit
Rd
Bit
Rd
Bit
Rd
bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
be used. If a Reset occurs while a write operation is in progress, the write operation will
be completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCR Register and thus the Flash from unintentional writes.
Table 98 on page 232
Table 98 on page 232
FLB7
FHB7
7
7
7
–
FHB6
FLB6
CC
6
6
6
–
, the Flash program can be corrupted because the supply voltage is
FHB5
FLB5
for detailed description and mapping of the Fuse High byte.
for detailed description and mapping of the Extended Fuse byte.
5
5
5
–
FHB4
FLB4
EFB4
4
4
4
FHB3
EFB3
FLB3
3
3
3
FLB2
FHB2
EFB2
2
2
2
Table 100 on page 233
CC
Reset Protection circuit can
FLB1
FHB1
EFB1
1
1
1
FHB0
FLB0
CC
0
0
0
–
. This will pre-
2513K–AVR–07/09
for a detailed