ATmega324P Automotive Atmel Corporation, ATmega324P Automotive Datasheet - Page 41

• Manufacturer Part Number: ATmega324P Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega324P Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8. Power Management and Sleep Modes
8.1
8.2
7674F–AVR–09/09
Overview
Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
Figure 7-1 on page 29
their distribution. The figure is helpful in selecting an appropriate sleep mode.
the different sleep modes, their wake up sources and BOD disable ability.
Table 8-1.
Notes:
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Sleep Mode
Idle
ADCNRM
Power-down
Power-save
Standby
Extended
Standby
“BOD Disable” on page 42
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
presents the different clock systems in the ATmega164P/324P/644P, and
X
X
X
for more details.
X
X
X
X
(2)
Oscillators
X
X
X
X
ATmega164P/324P/644P
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
X
X
X
X
X
X
Wake-up Sources
X
Table 8-2 on page 46
X
X
X
(2)
X
X
X
X
Table 8-1
X
X
X
X
X
X
X
shows
for a
X
X
X
X
41