ATmega48 Atmel Corporation, ATmega48 Datasheet



Manufacturer Part Number
Atmel Corporation

Specifications of ATmega48

Flash (kbytes)
4 Kbytes
Pin Count
Max. Operating Frequency
20 MHz
8-bit AVR
# Of Touch Channels
Hardware Qtouch Acquisition
Max I/o Pins
Ext Interrupts
Usb Speed
Usb Interface
Twi (i2c)
Graphic Lcd
Video Decoder
Camera Interface
Adc Channels
Adc Resolution (bits)
Adc Speed (ksps)
Analog Comparators
Resistive Touch Screen
Temp. Sensor
Crypto Engine
Sram (kbytes)
Eeprom (bytes)
Self Program Memory
Dram Memory
Nand Interface
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Mpu / Mmu
no / no
Output Compare Channels
Input Capture Channels
Pwm Channels
32khz Rtc
Calibrated Rc Oscillator
High performance, low power Atmel
Advanced RISC architecture
High endurance non-volatile memory segments
Peripheral features
Special microcontroller features
I/O and packages
Operating voltage:
Temperature range:
Speed grade:
Low power consumption
– 131 powerful instructions – most single clock cycle execution
– 32 × 8 general purpose working registers
– Fully static operation
– Up to 20 MIPS throughput at 20MHz
– On-chip 2-cycle multiplier
– 4/8/16 Kbytes of in-system self-programmable flash program memory
– 256/512/512 bytes EEPROM
– 512/1K/1Kbytes internal SRAM
– Write/erase cyles: 10,000 flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional boot code section with independent lock bits
– Programming lock for software security
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix acquisition
– Two 8-bit timer/counters with separate prescaler and compare mode
– One 16-bit timer/counter with separate prescaler, compare mode, and capture mode
– Real time counter with separate oscillator
– Six PWM channels
– 8-channel 10-bit ADC in TQFP and QFN/MLF package
– 6-channel 10-bit ADC in PDIP Package
– Programmable serial USART
– Master/slave SPI serial interface
– Byte-oriented 2-wire serial interface (Philips I
– Programmable watchdog timer with separate on-chip oscillator
– On-chip analog comparator
– Interrupt and wake-up on pin change
– DebugWIRE on-chip debug system
– Power-on reset and programmable brown-out detection
– Internal calibrated oscillator
– External and internal interrupt sources
– Five sleep modes: Idle, ADC noise reduction, power-save, power-down, and standby
– 23 programmable I/O lines
– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF
– 1.8V - 5.5V for Atmel ATmega48V/88V/168V
– 2.7V - 5.5V for Atmel ATmega48/88/168
– -40
– ATmega48V/88V/168V: 0 - 4MHz @ 1.8V - 5.5V, 0 - 10MHz @ 2.7V - 5.5V
– ATmega48/88/168: 0 - 10MHz @ 2.7V - 5.5V, 0 - 20MHz @ 4.5V - 5.5V
– Active mode:
– Power-down mode:
Up to 64 sense channels
In-system programming by on-chip boot program
True read-while-write operation
250µA at 1MHz, 1.8V
15µA at 32kHz, 1.8V (including oscillator)
0.1µA at 1.8V
1. See
C to 85
library support
“Data Retention” on page 7
for details.
8-bit microcontroller
C compatible)
8-bit Atmel
with 4/8/16K
Bytes In-System
Rev. 2545TS–AVR–05/11

Related parts for ATmega48

ATmega48 Summary of contents

Page 1

... Temperature range: ° ° – - • Speed grade: – ATmega48V/88V/168V 4MHz @ 1.8V - 5.5V 10MHz @ 2.7V - 5.5V – ATmega48/88/168 10MHz @ 2.7V - 5.5V 20MHz @ 4.5V - 5.5V • Low power consumption – Active mode: 250µA at 1MHz, 1.8V 15µA at 32kHz, 1.8V (including oscillator) – Power-down mode: 0.1µA at 1.8V Note: 1. See “Data Retention” on page 7 ® ...

Page 2

... Pin configurations Figure 1-1. Pinout Atmel ATmega48/88/1682545TS TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 VCC 3 GND 4 (PCINT6/XTAL1/TOSC1) PB6 5 (PCINT7/XTAL2/TOSC2) PB7 6 (PCINT21/OC0B/T1) PD5 7 NOTE: Bottom pad should be soldered to ground. ...

Page 3

... As inputs, Port D pins that are externally pulled low will source current if the pull-up 2545TS–AVR–05/11 “System clock and clock options” on page Table 28-3 on page ATmega48/88/168 “Alternate functions of port B” on page 26. 306. Shorter pulses are not guaran- “Alternate functions of port C” on page ...

Page 4

... ADC7:6 (TQFP and QFN/MLF package only) In the TQFP and QFN/MLF package, ADC7:6 serve as analog inputs to the A/D converter. These pins are powered from the analog supply and serve as 10-bit ADC channels. ATmega48/88/168 4 , even if the ADC is not used. If the ADC is used, it should be connected “ ...

Page 5

... Overview The Atmel ATmega48/88/168 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48/88/168 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. ...

Page 6

... Atmel ATmega48/88/168 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega48/88/168 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emu- lators, and Evaluation kits ...

Page 7

... ATmega88 and ATmega168 support a real Read-While-Write Self-Programming mechanism. There is a separate Boot Loader Section, and the SPM instruction can only execute from there. In ATmega48, there is no Read-While-Write support and no separate Boot Loader Section. The SPM instruction can execute from the entire Flash. ...

Page 8

... The QTouch Library is FREE and downloadable from the Atmel website at the following location: For implementation details and other information, refer to the Atmel QTouch Library User Guide ATmega48/88/168 8 - also available for download from the Atmel website. 2545TS–AVR–05/11 ...

Page 9

... USART I/O data register USART baud rate register low – – – UMSEL00 UPM01 UPM00 USBS0 TXCIE0 UDRIE0 RXEN0 TXEN0 TXC0 UDRE0 FE0 DOR0 ATmega48/88/168 Bit 2 Bit 1 Bit 0 – – – – – – – – – – – – – ...

Page 10

... TCNT1L (0x83) Reserved – (0x82) TCCR1C FOC1A (0x81) TCCR1B ICNC1 (0x80) TCCR1A COM1A1 (0x7F) DIDR1 – (0x7E) DIDR0 – ATmega48/88/168 10 Bit 6 Bit 5 Bit 4 Bit 3 – – – – – – TWAM5 TWAM4 TWAM3 TWAM2 TWEA TWSTA TWSTO TWWC 2-wire serial interface data register ...

Page 11

... EEPROM address register low byte EEPROM data register – EEPM1 EEPM0 General purpose I/O register 0 – – – – – – ATmega48/88/168 Bit 3 Bit 2 Bit 1 Bit 0 – – – – MUX3 MUX2 MUX1 MUX0 – ...

Page 12

... Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel ATmega48/88/168 is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used ...

Page 13

... PC ← then PC ← then PC ← then PC ← then PC ← then PC ← ATmega48/88/168 Operation Flags #Clocks ...

Page 14

... Load program memory and post-inc SPM Store program memory IN Rd port OUT P, Rr Out port PUSH Rr Push register on stack ATmega48/88/168 14 Description then PC ← then PC ← I/O(P,b) ← 1 I/O(P,b) ← 0 Rd(n+1) ← Rd(n), Rd(0) ← 0 Rd(n) ← Rd(n+1), Rd(7) ← 0 Rd(0)←C,Rd(n+1)← Rd(n),C←Rd(7) Rd(7)←C,Rd(n)← Rd(n+1),C←Rd(0) Rd(n) ← Rd(n+1), n=0..6 Rd(3..0)← ...

Page 15

... BREAK Break Note: 1. These instructions are only available in Atmel ATmega168. 2545TS–AVR–05/11 Description Rd ← STACK (See specific descr. for sleep function) (See specific descr. for WDR/timer) For on-chip debug only ATmega48/88/168 Operation Flags #Clocks None None None None None 2 ...

Page 16

... Ordering information 9.1 Atmel ATmega48 Speed (MHz) Power supply (3) 10 1.8V - 5.5V (3) 20 2.7V - 5.5V Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging alternative, complies to the European Directive for Restriction of Hazardous Substances (RoHS direc- tive) ...

Page 17

... Ordering code (4) ATmega88V-10AUR (4) ATmega88V-10MUR ATmega88V-10AU ATmega88V-10MU ATmega88V-10PU (4) ATmega88-20AUR (4) ATmega88-20MUR ATmega88-20AU ATmega88-20MU ATmega88-20PU and Figure 28-2 on page 304. Package type ATmega48/88/168 (1) Package Operational range 32A 32M1-A Industrial 32A ° (- 32M1-A 28P3 32A 32M1-A Industrial 32A ° (- 32M1-A 28P3 ° ...

Page 18

... Tape & reel 32A 32-lead, thin (1.0mm) plastic quad flat package (TQFP) 32M1-A 32-pad, 5 × 5 × 1.0 body, lead pitch 0.50mm quad flat no-lead/micro lead frame package (QFN/MLF) 28P3 28-lead, 0.300” wide, plastic dual inline package (PDIP) ATmega48/88/168 18 (2) Ordering code (4) ATmega168V-10AUR (4) ...

Page 19

... PIN 0°~7° TITLE 32A, 32-lead 7mm Body Size, 1.0mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega48/88/168 A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

Page 20

... TOP VIEW 0.20 b 0.4 Ref BOTTOM VIEW (4x) The terminal # Laser-marked Feature. Note: Package Drawing Contact: ATmega48/88/168 TITLE 28M1, 28-pad 1.0mm Body, Lead Pitch 0.45mm, 2.4 x 2.4mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package (VQFN) ...

Page 21

... TITLE 32M1-A, 32-pad 1.0mm Body, Lead Pitch 0.50mm, 3.10mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega48/88/168 SIDE VIEW A3 A1 COMMON DIMENSIONS 0.08 C (Unit of Measure = mm) MIN NOM MAX SYMBOL A 0.80 0.90 1.00 A1 – ...

Page 22

... A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R ATmega48/88/168 22 D PIN PLACES 0º ~ 15º REF eB TITLE 28P3, 28-lead (0.300"/7.62mm Wide) Plastic Dual ...

Page 23

... Errata 11.1 Errata Atmel ATmega48 The revision letter in this section refers to the revision of the ATmega48 device. 11.1.1 Rev. D • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous Timer/Counter register (TCNTx) is 0x00 ...

Page 24

... necessary to read an EEPROM location after Erase Only, use an Atomic Write opera- tion with 0xFF as data in order to erase a location. In any case, the Write Only operation can be used as intended. Thus no special considerations are needed as long as the erased loca- tion is not read before it is programmed. ATmega48/88/168 24 2545TS–AVR–05/11 ...

Page 25

... Timer/Counter register (TCNTx) is 0x00. Problem fix/workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 2545TS–AVR–05/11 ATmega48/88/168 25 ...

Page 26

... A reset is applied in a 10ns window while the system clock prescaler value is updated by software. - Leaving SPI-programming mode generates an internal reset signal that can trigger this case. The two first cases can occur during normal operating mode, while the last case occurs only during programming of the device. ATmega48/88/168 26 2545TS–AVR–05/11 ...

Page 27

... The following three cases can trigger the device to get stuck in a reset-state: - Two succeeding resets are applied where the second reset occurs in the 10ns window before the device is out of the reset-state caused by the first reset. 2545TS–AVR–05/11 ATmega48/88/168 27 ...

Page 28

... The problem is most often seen during In- System Programming of the device. There are theoretical possibilities of this happening also in run-mode. The following three cases can trigger the device to get stuck in a reset-state: ATmega48/88/168 28 2545TS–AVR–05/11 ...

Page 29

... Timer/Counter register (TCNTx) is 0x00. Problem fix/workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 2545TS–AVR–05/11 ATmega48/88/168 29 ...

Page 30

... Rev. 2545Q-06/ 12.5 Rev. 2545P-02/09 1. ATmega48/88/168 30 Ordering information has been updated by removing AI and MI and added AUR and MUR (tape & reel). Added and corrected cross references and short-cuts. Document updated according to new Atmel standard. QTouch Library Support Features Note 6 and Note 7 in Table 28-5, “ ...

Page 31

... Updated Note in Table 8-3 on page Table 8-10 on page 33. Updated “Interrupts” on page 55. Updated“Errata Atmel ATmega48” on page 22 Changed description in “Analog-to-digital converter” on page ATmega48/88/168 “System and reset characteristics” on and added the note “Not recommended for new 7. 35. ...

Page 32

... Rev. 2545G-06/ ATmega48/88/168 32 Updated “Features” on page 1. Updated Table 1-1 on page 2. Updated “Ordering information” on page Updated “Packaging Information” on page Updated “Features” on page 1. Updated Features in “2-wire serial interface” on page Fixed typos in Table 28-3 on page Updated typos ...

Page 33

... Added Table 28-1 on page 305. Updated Figure 15-7 on page 121, Updated rev “Errata Atmel ATmega48” on page Added rev. C and D in “Errata Atmel ATmega48” on page Added Section 3. “Resources” on page 7 Update Section 8.6 “Calibrated internal RC oscillator” on page Updated Section 27.8.3 “ ...

Page 34

... Table 23-5 on page page 285 to 287 and Table 23-1 on page 284. Fixed typo in Table 12-1 on page Updated whole “Typical characteristics” on page Added item “Errata Atmel ATmega48” on page Table 28-4 on page 306, Table 26-9 on page 35. to 209. 215. 298. “Atmel ATmega168” on page 17 ...

Page 35

Renamed the following bits: - SPMEN to SELFPRGEN - PSR2 to PSRASY - PSR10 to PSRSYNC - Watchdog Reset to Watchdog System Reset 11. Updated C code examples containing old IAR syntax. 12. Updated BLBSET description in tus register” ...

Page 36

... Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 ® and others are registered trademarks or trademarks of Atmel Corporation or its Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81)(3) 3523-3551 Fax: (+81)(3) 3523-7581 2545TS–AVR–05/11 ...

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