ATmega48PA Atmel Corporation, ATmega48PA Datasheet - Page 42
ATmega48PA
Manufacturer Part Number
ATmega48PA
Description
Manufacturer
Atmel Corporation
Specifications of ATmega48PA
Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10.5
10.6
10.7
8271D–AVR–05/11
Power-down Mode
Power-save Mode
Standby Mode
When the SM2...0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the external Oscillator is stopped, while the external interrupts, the 2-
wire Serial Interface address watch, and the Watchdog continue operating (if enabled). Only an
External Reset, a Watchdog System Reset, a Watchdog Interrupt, a Brown-out Reset, a 2-wire
Serial Interface address match, an external level interrupt on INT0 or INT1, or a pin change
interrupt can wake up the MCU. This sleep mode basically halts all generated clocks, allowing
operation of asynchronous modules only.
Note:
When waking up from Power-down mode, there is a delay from the wake-up condition occurs
until the wake-up becomes effective. This allows the clock to restart and become stable after
having been stopped. The wake-up period is defined by the same CKSEL Fuses that define the
Reset Time-out period, as described in
When the SM2...0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-
save mode. This mode is identical to Power-down, with one exception:
If Timer/Counter2 is enabled, it will keep running during sleep. The device can wake up from
either Timer Overflow or Output Compare event from Timer/Counter2 if the corresponding
Timer/Counter2 interrupt enable bits are set in TIMSK2, and the Global Interrupt Enable bit in
SREG is set.
If Timer/Counter2 is not running, Power-down mode is recommended instead of Power-save
mode.
The Timer/Counter2 can be clocked both synchronously and asynchronously in Power-save
mode. If Timer/Counter2 is not using the asynchronous clock, the Timer/Counter Oscillator is
stopped during sleep. If Timer/Counter2 is not using the synchronous clock, the clock source is
stopped during sleep. Note that even if the synchronous clock is running in Power-save, this
clock is only available for Timer/Counter2.
When the SM2...0 bits are 110 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in six clock cycles.
If a level triggered interrupt is used for wake-up from Power-down, the required level must be held
long enough for the MCU to complete the wake-up to trigger the level interrupt. If the level disap-
pears before the end of the Start-up Time, the MCU will still wake up, but no interrupt will be
generated.
Fuses as described in
”External Interrupts” on page
ATmega48A/PA/88A/PA/168A/PA/328/P
”System Clock and Clock Options” on page
”Clock Sources” on page
72. The start-up time is defined by the SUT and CKSEL
28.
27.
42
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