ATmega645P Atmel Corporation, ATmega645P Datasheet - Page 84
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ATmega645P
Manufacturer Part Number
ATmega645P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645P
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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14.3.5
8285D–AVR–06/11
Alternate Functions of Port G
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Table 14-13. Overriding Signals for Alternate Functions in PF3:PF0
The alternate pin configuration is as follows:
Table 14-14. Port G Pins Alternate Functions
Note:
The alternate pin configuration is as follows:
• RESET – Port G, Bit 5
RESET: External Reset input. When the RSTDISBL Fuse is programmed (‘0’), PG5 will function
as input with pull-up always on.
• T0 – Port G, Bit 4
T0, Timer/Counter0 Counter Source.
• T1 – Port G, Bit 3
T1, Timer/Counter1 Counter Source.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Port Pin
PG5
PG4
PG3
PG2
PG1
PG0
1. Port G, PG5 is input only. Pull-up is always on.
See
PF3/ADC3
0
0
0
0
0
0
–
0
0
–
ADC3 INPUT
Table 27-3 on page 284
Alternate Function
RESET
T0 (Timer/Counter0 Clock Input)
T1 (Timer/Counter1 Clock Input)
–
–
–
PF2/ADC2
0
0
0
0
0
0
–
0
0
–
ADC2 INPUT
for RSTDISBL fuse.
(1)
PF1/ADC1
0
0
0
0
0
0
–
0
0
–
ADC1 INPUT
PF0/ADC0
0
0
0
0
0
0
–
0
0
–
ADC0 INPUT
84
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