ATtiny24 Atmel Corporation, ATtiny24 Datasheet - Page 156

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ATtiny24

Manufacturer Part Number
ATtiny24
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny24

Flash (kbytes)
2 Kbytes
Pin Count
14
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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18.6.3
156
ATtiny24/44/84
Reading Device Signature Imprint Table from Firmware
To read the Fuse High Byte (FHB), simply replace the address in the Z-pointer with 0x0003 and
repeat the procedure above. If successful, the contents of the destination register are as follows.
Refer to
To read the Fuse Extended Byte (FEB), replace the address in the Z-pointer with 0x0002 and
repeat the previous procedure. If successful, the contents of the destination register are as
follows.
Refer to
Byte.
To read the contents of the device signature imprint table, follow the below procedure:
The RSIG and SPMEN bits will auto-clear after three CPU cycles. When RSIG and SPMEN are
cleared, LPM will work as described in the “AVR Instruction Set” description.
See program example below.
Note:
Bit
Rd
Bit
Rd
Assembly Code Example
1. Load the Z-pointer with the table index.
2. Set RSIG and SPMEN bits in SPMCSR.
3. Issue an LPM instruction within three clock cycles.
4. Wait three clock cycles for SPMEN bits to be cleared.
5. Read table data from the LPM destination register.
DSIT_read:
; Uses Z-pointer as table index
ldi
ldi
; Preload SPMCSR bits into R16, then write to SPMCSR
ldi
out SPMCSR, r16
; Issue LPM. Table data will be returned into r17
lpm r17, Z
ret
See
Table 19-4 on page 160
Table 19-3 on page 160
“Code Examples” on page
ZH, 0
ZL, 1
r16, (1<<RSIG)|(1<<SPMEN)
FHB7
FEB7
7
7
FHB6
FEB6
6
6
for detailed description and mapping of the Fuse High Byte.
FHB5
FEB5
for detailed description and mapping of the Fuse Extended
5
5
6.
FHB4
FEB4
4
4
FHB3
FEB3
3
3
FHB2
FEB2
2
2
FHB1
FEB1
1
1
FHB0
FEB0
0
0
8006K–AVR–10/10

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