ATtiny84 Atmel Corporation, ATtiny84 Datasheet - Page 95

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ATtiny84

Manufacturer Part Number
ATtiny84
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny84

Flash (kbytes)
8 Kbytes
Pin Count
14
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
6
Hardware Qtouch Acquisition
No
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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12.7.1
8006K–AVR–10/10
Compare Output Mode and Waveform Generation
Figure 12-5. Compare Match Output Unit, Schematic (non-PWM Mode)
The general I/O port function is overridden by the Output Compare (OC1x) from the Waveform
Generator if either of the COM1x1:0 bits are set. However, the OC1x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC1x pin (DDR_OC1x) must be set as output before the OC1x value is visi-
ble on the pin. The port override function is generally independent of the Waveform Generation
mode, but there are some exceptions. See
and
The design of the Output Compare pin logic allows initialization of the OC1x state before the out-
put is enabled. Note that some COM1x1:0 bit settings are reserved for certain modes of
operation. See
The COM1x1:0 bits have no effect on the Input Capture unit.
The Waveform Generator uses the COM1x1:0 bits differently in normal, CTC, and PWM modes.
For all modes, setting the COM1x1:0 = 0 tells the Waveform Generator that no action on the
OC1x Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to
page
page
A change of the COM1x1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the 1x
strobe bits.
COMnx1
COMnx0
FOCnx
clk
I/O
Table 12-4 on page 109
109, and for phase correct and phase and frequency correct PWM refer to
109.
“Register Description” on page 108
Waveform
Generator
Table 12-2 on page
for details.
D
D
D
PORT
DDR
OCnx
Table 12-2 on page
109. For fast PWM mode refer to
Q
Q
Q
1
0
109,
ATtiny24/44/84
Table 12-3 on page 109
Table 12-3 on
Table 12-4 on
OCnx
Pin
95

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