ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 23

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12. System Control and Reset
12.1
12.2
12.3
12.3.1
12.3.2
12.3.3
8386A–AVR–07/11
Features
Overview
Reset Sources
Power-On Reset
External Reset
Watchdog Reset
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The Reset System issues a microcontroller reset and set the device to its initial state. This is for
situation where operation should not start or continue, for example when the microcontroller
operates below its power supply rating. If a reset source goes active, the device enters and be
kept in reset until all reset sources have released their reset. The I/O pins are immediately
tristated.
The program counter is set to the Reset Vector location and all I/O registers are set to the initial
value. The SRAM content is kept, but not guaranteed.
After reset is released from all reset sources, the default oscillator is started and calibrated
before the device starts running from the Reset Vector address. By default this is the lowest pro-
gram memory address, '0', but it is possible to move the Reset Vector to the lowest address in
the Boot Section.
The reset functionality is asynchronous, so no running system clock is required to reset the
device. The software reset feature makes it possible to issue a controlled system reset from the
user software.
The reset status register has individual status flags for each reset source. It is cleared at Power-
on Reset, it shows which sources that have issued a reset since the last power-on.
The device is reset when the supply voltage VCC is below the Power-on Reset threshold
voltage.
The device is reset when a low level is present on the RESET pin.
The device is reset when the Watchdog Timer period expires and the Watchdog Reset is
enabled. The Watchdog Timer runs from a dedicated oscillator independent of the System
Clock. For more details see
Reset the microcontroller and set it to its initial state when a reset source goes active
Multiple reset sources that cover different situations
Asynchronous operation
Reset Status Register for reading the reset source from the application code
– Power-On Reset
– External Reset
– Watchdog Reset
– Brown-Out Reset
– PDI reset
– Software reset
– No running system clock in the device is required for the reset
”WDT - Watchdog Timer” on page
25.
XMEGA A3U
23