ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 41

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

23. USART
23.1
23.2
8386A–AVR–07/11
Features
Overview
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The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a
fast and flexible serial communication module. The USART supports full duplex communication,
and both asynchronous and clocked synchronous operation. The USART can also be set in
Master SPI mode and be used for SPI communication.
Communication is frame based, and the frame format can be customized to support a wide
range of standards. The USART is buffered in both direction, enabling continued data transmis-
sion without any delay between frames. There are separate interrupts for receive and transmit
complete, enabling fully interrupt driven communication. Frame error and buffer overflow are
detected in hardware and indicated with separate status flags. Even or odd parity generation
and parity check can also be enabled.
The Clock Generation logic has a fractional baud rate generator that is able to generate a wide
range of USART baud rates from any system clock frequencies. This remove the need to use
an external crystal oscillator with a certain frequency in order to achieve a required baud rate. It
also includes support external clock input in synchronous slave operation.
One USART can use the IRCOM module to support IrDA 1.4 physical compliant pulse modula-
tion and demodulation for baud rates up to 115.2kbps.
PORTC, PORTD, and PORTE each has two USARTs, while PORTF has one USART only.
Notation of these peripherals are USARTC0, USARTC1, USARTD0, USARTD1, USARTE0,
USARTE1 and USARTF0, respectively.
Seven Identical USART peripherals
Full Duplex Operation
Asynchronous or Synchronous Operation
Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Fractional Baud Rate Generator
Built in error detection and correction schemes
Separate Interrupts for
Multi-Processor Communication Mode
Master SPI Mode
IRCOM Module for IrDA compliant pulse modulation/demodulation
– Synchronous clock rates up to 1/2 o the device clock frequency
– Asynchronous clock rates up to 1/8 of the device clock frequency
– Can generate desired baud rate from any system clock frequency
– No need for external oscillator with certain frequencies
– Odd or Even Parity Generation and Parity Check
– Data Over Run and Framing Error Detection
– Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
– Transmit Complete
– Transmit Data Register Empty
– Receive Complete
– Addressing scheme to address a specific devices on a multi-device bus
– Enable unaddressed devices to automatically ignore all frames
– Double Buffered Operation
– Configurable Data Order
– High Speed Operation up to 1/2 of the peripheral clock frequency
XMEGA A3U
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