ATxmega32A4 Atmel Corporation, ATxmega32A4 Datasheet - Page 164

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ATxmega32A4

Manufacturer Part Number
ATxmega32A4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega32A4

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
7
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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14.10 DMA Support.
14.11 Timer/Counter Commands
8077H–AVR–12/09
The interrupt flags can be used to trigger DMA transactions.
transfer triggers available from the T/C, and the DMA action that will clear the transfer trigger.
For more details on using DMA refer to
Table 14-2.
A set of commands can be given to the Timer/Counter by software to immediately change the
state of the module. These commands give direct control of the Update, Restart, and Reset
signals.
An update command has the same effect as when an update condition occurs. The update com-
mand is ignored if the Lock Update bit is set.
The software can force a restart of the current waveform period by issuing a restart command. In
this case the Counter, direction, and all compare outputs are set to zero.
A reset command will set all Timer/Counter registers to their initial values. A reset can only be
given when the Timer/Counter is not running (OFF).
Request
OV/UNFIF
ERRIF
CCxIF
DMA Request Sources
Acknowledge
DMA Controller writes to CNT
DMA Controller writes to PER
DMA Controller writes to PERBUF
N/A
DMA Controller access of CCx
DMA Controller access of CCxBUF
”DMA - Direct Memory Access Controller” on page
Table 14-2 on page 164
Comment
Input Capture operation
Output Compare operation
XMEGA A
lists the
49.
164

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