SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 186

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Instruction Cycle Times
8.13
8-26
Store register
A store register operation executes in a single cycle. During the Execute cycle, the store
address is calculated, and the data to be stored is read onto the C bus.
Table 8-22 shows the cycle timing for a store register operation, where:
s
t
Cycle
1
Copyright © 2000 ARM Limited. All rights reserved.
IA
pc+3i
InMREQ,
ISEQ
S cycle
Represents the current mode-dependent value.
Is either 0, when the T bit is specified in the instruction (for
example
STRT
INSTR
(pc+2i)
(pc+3i)
) or s at all other times.
Table 8-22 Store register operation cycle timing
DA
da
DnMREQ,
DSEQ
N cycle
DnTRANS
t
ARM DDI 0165B
WDATA
Rd