SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 322
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SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 322 of 1145
- Download datasheet (26Mb)
26.5.4.1
322
322
Hardware Configuration
Software Configuration
SAM9X25
SAM9X25
2x8-bit DDR2 on EBI
The DDR2 initialization sequence is described in the sub-section “DDR2 Device Initialization” of
the DDRSDRC section.
In this case VDDNF can be different from VDDIOM. NAND Flash device can be 3.3V or 1.8V
and wired on D16-D31 data bus. NFD0_ON_D16 is to be set to 1.
• Assign EBI_CS1 to the DDR2 controller by setting the EBI_CS1A bit in the EBI Chip Select
• Initialize the DDR2 Controller depending on the DDR2 device and system bus frequency.
Register located in the bus matrix memory space.
11054A–ATARM–27-Jul-11
11054A–ATARM–27-Jul-11
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