AD633JNZ Analog Devices Inc, AD633JNZ Datasheet - Page 5

• Manufacturer Part Number: AD633JNZ
• Description: IC ANALOG MULTIPLIER 8-DIP
• Manufacturer: Analog Devices Inc

Specifications of AD633JNZ

• Function: Analog Multiplier
• Number Of Bits/stages: 4-Quadrant
• Package / Case: 8-DIP (0.300", 7.62mm)
• No. Of Multipliers / Dividers: 1
• No. Of Amplifiers: 3
• Supply Voltage Range: ± 8V To ± 18V
• Slew Rate: 20V/µs
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: DIP
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

At ω
attenuated by √2), and the Y input lags the X input by 45° (and
is also attenuated by √2). Since the X and Y inputs are 90° out of
phase, the response of the circuit will be (satisfying Equation 3):
which has no dc component. Resistors R1 and R2 are included to
restore the output amplitude to 10 V for an input amplitude of 10 V.
The amplitude of the output is only a weak function of frequency:
the output amplitude will be 0.5% too low at ω = 0.9 ω
ω
Generating Inverse Functions
Inverse functions of multiplication, such as division and square
rooting, can be implemented by placing a multiplier in the feed-
back loop of an op amp. Figure 6 shows how to implement a
square rooter with the transfer function
for the condition E < 0.
REV. E
W
o
= 1.1 ω
=
=
o
W
E
(
(
= 1/CR, the X input leads the input signal by 45° (and is
10
40
E
=
1
Figure 5. ”Bounceless” Frequency Doubler
V
V
Figure 6. Connections for Square Rooting
2
OP27
o
)
+15V
–15V
E
)
(
.
10
(
C
7
4
R
E
sin
2
0.1 F
0.1 F
E V
(
2
sin
)
ω
1N4148
1
2
3
4
o
ω
t
)
o
X1
X2
Y1
Y2
AD633JN
t
+
1N4148
45
1
2
3
4
+V
°
–V
)
W
Z
X1
X2
Y1
Y2
S
S
AD633JN
E
2
8
7
6
5
+15V
(
0.1 F
sin
0.1 F
+V
–V
–15V
1k
ω
W
R1
Z
S
S
o
t
8
7
6
5
−
R2
3k
+15V
–15V
45
W =
0.1 F
0.1 F
°
W =
)
10V
E
(
2
10E
o
, and
)
V
(4)
(5)
–5–
Likewise, Figure 7 shows how to implement a divider using a
multiplier in a feedback loop. The transfer function for the
divider is
Variable Scale Factor
In some instances, it may be desirable to use a scaling voltage
other than 10 V. The connections shown in Figure 8 increase
the gain of the system by the ratio (R1 + R2)/R1. This ratio is
limited to 100 in practical applications. The summing input, S,
may be used to add an additional signal to the output or it may
be grounded.
Current Output
The AD633’s voltage output can be converted to a current
output by the addition of a resistor R between the AD633’s W
and Z pins as shown in Figure 9. This arrangement forms
INPUT
INPUT
E
Y
X
W
10k
Figure 8. Connections for Variable Scale Factor
INPUT
INPUT
R
' = −
X
Y
1
2
3
4
Figure 9. Current Output Connections
(
X1
X2
Y1
Y2
10
AD633JN
Figure 7. Connections for Division
1
2
3
4
AD711
V
–15V
+15V
X1
X2
Y1
Y2
)
AD633JN
+V
E
–V
0.1 F
0.1 F
E
W
X
Z
S
S
8
7
6
5
+V
–V
+15V
W
0.1 F
Z
S
S
E
0.1 F
X
8
7
6
5
–15V
+15V
–15V
R1
R
1
2
3
4
S
0.1 F
0.1 F
10k
R2
R
X1
X2
Y1
Y2
AD633JN
W =
(X
I
O
1
=
1k
+V
–V
– X
W
R
1
Z
S
S
1k
10V
2
) (Y
8
7
6
5
(X
R1, R2
+15V
1
1
–15V
– Y
– X
R
0.1 F
10V
0.1 F
2
2
AD633
W' = –10V
)
) (Y
100k
100k
(R1 + R2)
1
– Y
R1
2
)
E
E
X
+ S
(6)