CS6422-CSZ Cirrus Logic Inc, CS6422-CSZ Datasheet - Page 13

• Manufacturer Part Number: CS6422-CSZ
• Description: IC SPEAKERPHONE ENHANCED 20SOIC
• Manufacturer: Cirrus Logic Inc
• Type: Audio Processorr

Specifications of CS6422-CSZ

• Package / Case: 20-SOIC
• Applications: Speakerphones
• Mounting Type: Surface Mount
• Product: General Purpose Audio Amplifiers
• Available Set Gain: 34 dB
• Thd Plus Noise: 0.03 %
• Operating Supply Voltage: 5 V
• Supply Current: 10 mA, 50 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Audio - Load Impedance: 10 KOhms
• Input Offset Voltage: 2.12 V
• Minimum Operating Temperature: 0 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Rohs Compliant: Yes
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: SOIC
• No. Of Pins: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1200-5

STROBE pulses must be applied to latch the data
into the CS6422.
Since the MCR is a shift register, the STROBE can
be run arbitrarily slowly with a duty cycle limited
only by the minimum high and low time specified
in “Switching Characteristics”. The Microcontrol-
ler Interface is polled at 125 µs intervals, so regis-
ter writes must be spaced at least 125 µs apart or
the register contents may be overwritten.
DS295F1
STROBE
#
0
1
2
3
4
5
DRDY
DATA
HwlD
b15
Mic
1
0
RHDet
THDet
TSAtt
AErle
00
00
00
00
HDD
b14
TD
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9
0
0
PCSen
APCD
b13
0
0
RSThd
AFNse
Taps
GB
10
10
00
00
NPCD
b12
0
TDbtS
APFD
000
b11
Table 2. MCR Control Register Mapping
NseRmp
0
Figure 7. Microcontroller Interface
NErle
00
00
NPFD
b10
0
0100
1010
RVol
TVol
Bit8
AECD
b9
Bit7
0
NFNse
RDbtS
HDly
00
00
00
Bit6
NECD
3.2.2
The six control registers accessible through the
MCR are described in detail in the following tables.
These registers are addressed by bits b3-0 of the
MCR. Bit ‘b0’ must always be ‘0’. Table 2 shows
the register map with the default settings. Tables 3
through 8 show the control registers in more detail.
The Register Map at the top of each register de-
scription shows the names of all the bits, with their
reset values below the bitfield name. The reset val-
ue can also be found in the Word column of the bit-
field summary as indicated by an ‘*’.
b8
0
Bit5
HHold
RSD
TSD
Bit4
b7
0
0
0
Register Definitions
TSThd
RGain
ASdt
Bit3
00
00
00
TDSRmp
Bit2
b6
0
Bit1
NCC
ACC
00
00
RDSRmp
Bit0
b5
0
TSBias
four extra strobe pulses
TGain
1
NSdt
00
00
00
AuNECD
TSMde
2
IdlTx
b4
0
0
0
3
CS6422
CS6422
4
0000
0010
0100
0110
1000
1010
b3-0
13
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