CS8421-CNZ Cirrus Logic Inc, CS8421-CNZ Datasheet - Page 19
![IC SAMPLE RATE CONVERTER 20QFN](/photos/7/3/70373/mfg_cs8421_series_sml.jpg)
CS8421-CNZ
Manufacturer Part Number
CS8421-CNZ
Description
IC SAMPLE RATE CONVERTER 20QFN
Manufacturer
Cirrus Logic Inc
Type
Sample Rate Converterr
Datasheet
1.CS8421-CZZ.pdf
(36 pages)
Specifications of CS8421-CNZ
Package / Case
20-QFN
Applications
Digital Audio
Mounting Type
Surface Mount
Operating Supply Voltage
3.3 V / 5.0 V
Operating Temperature Range
- 10 C to + 70 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1018 - BOARD EVAL FOR CS8421
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1730
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS8421-CNZ
Manufacturer:
CIRRUS
Quantity:
235
DS641F5
Table 1. Serial Audio Port Master/Slave and Clock Ratio Select Start-Up Options (MS_SEL)
1.96 k ± 1% to GND
4.02 k ± 1% to GND
8.06 k ± 1% to GND
16.2 k ± 1% to GND
1.0 k ± 1% to GND
1.96 k ± 1% to VL
4.02 k ± 1% to VL
8.06 k ± 1% to VL
127.0 k ± 1% to GND
1.0 k ± 1% to VL
1.96 k ± 1% to GND
4.02 k ± 1% to GND
1.96 k ± 1% to GND
4.02 k ± 1% to GND
8.06 k ± 1% to GND
16.2 k ± 1% to GND
32.4 k ± 1% to GND
63.4 k ± 1% to GND
127.0 k ± 1% to VL
1.0 k ± 1% to GND
1.0 k ± 1% to GND
1.96 k ± 1% to VL
4.02 k ± 1% to VL
1.96 k ± 1% to VL
4.02 k ± 1% to VL
8.06 k ± 1% to VL
16.2 k ± 1% to VL
32.4 k ± 1% to VL
63.4 k ± 1% to VL
1.0 k ± 1% to VL
1.0 k ± 1% to VL
MS_SEL pin
Table 3. Serial Audio Output Port Start-Up Options (SAOF)
SAOF pin
SAIF pin
Table 2. Serial Audio Input Port Start-Up Options (SAIF)
Master (
Master (
Master (
Master (
Input M/S
Slave
Slave
Slave
Slave
Slave
Output Port Configuration
128 x Fsi
256 x Fsi
384 x Fsi
Left-Justified up to 32-bit data
512
Input Port Configuration
Right-Justified 16-bit data
Right-Justified 20-bit data
Right-Justified 24-bit data
Right-Justified 32-bit data
Right-Justified 16-bit data
Right-Justified 20-bit data
Right-Justified 24-bit data
Right-Justified 32-bit data
Left-Justified 16-bit data
Left-Justified 20-bit data
Left-Justified 24-bit data
Left-Justified 32-bit data
TDM Mode 16-bit data
TDM Mode 20-bit data
TDM Mode 24-bit data
TDM Mode 32-bit data
I²S up to 32-bit data
x Fsi)
I²S 16-bit data
I²S 20-bit data
I²S 24-bit data
I²S 32-bit data
)
)
)
Master (
Master (
Master (
Master (
Output M/S
Slave
Slave
Slave
Slave
Slave
128 x Fso
256 x Fso
384
512
x Fso)
x Fso)
)
)
CS8421
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