IRS20954STRPBF International Rectifier, IRS20954STRPBF Datasheet - Page 12

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IRS20954STRPBF

Manufacturer Part Number
IRS20954STRPBF
Description
IC DVR DGTL AUDIO PROT 16-SOIC
Manufacturer
International Rectifier
Type
MOSFET Driverr
Datasheet

Specifications of IRS20954STRPBF

Applications
Amplifiers, Receivers
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Latched Protection
Connecting CSD to V
The over-current protection stays in shutdown mode after over-current condition detected. To reset the latch status, an
external reset switch brings CSD pin voltage down below the lower threshold, V
is 200 ns.
Interfacing with System Controller
The IRS20954 communicates with external system controller by adding simple interfacing circuit shown in Fig. 11. A
generic PNP-BJT U1, such as 2N3906, is to send out SD signal when OCP event happens by capturing sinking
current in CSD pin. Another generic NPN-BJT U2, such as 2N3094, is to reset the internal protection logic by pulling
the CSD voltage below V
Programming OCP Trip Level
In a Class D audio amplifier, the direction of the load current alternates according to the audio input signal. An over-
current condition can therefore happen during either a positive current cycle or a negative current cycle. The IRS20954
uses R
and low-side have different implementations of current sensing.
determined threshold, OC output signal is fed to the protection block to shutdown the MOSFET to protect the devices.
DS(ON)
in the output MOSFET as current sensing resistors. Due to the high voltage IC structural constraints, high
DD
Not recommended for new designs.
through a 10 kΩ or less resistor configures the IRS20954 as a latched over-current protection.
th2
. Note that the CSD pin is configured as a latched type OCP in this configuration.
Please use IRS20957SPBF.
Figure 10: Latched Protection Configuration
Figure 11: Interfacing System Controller
RESET
SHUTDOWN
Figure 9: Shutdown Input
<10k
VDD
CSD
VSS
VREF
OCSET
VREF
NC
VDD
CSD
VSS
OCSET
IN
DT
NC
DT
IN
CSH
VCC
COM
CSH
VCC
HO
NC
COM
VB
VS
LO
HO
NC
VB
VS
LO
Once measured current gets exceeded pre-
th2
. Minimum reset pulse width required
IRS20954SPBF
12

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