MAX13325GUI/V+T Maxim Integrated Products, MAX13325GUI/V+T Datasheet - Page 11
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MAX13325GUI/V+T
Manufacturer Part Number
MAX13325GUI/V+T
Description
IC AUD LINE DVR DL AUTO 28TSSOP
Manufacturer
Maxim Integrated Products
Type
Line Driver, Transmitterr
Datasheet
1.MAX13325GUIV.pdf
(21 pages)
Specifications of MAX13325GUI/V+T
Applications
Automotive Audio
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 4. General Fault Register Format
TWARN: The TWARN bit is set to ‘1’ when the temperature warning threshold is reached.
TSHDN: The TSHDN is set to ‘1’ when the temperature shutdown threshold is reached.
DUMP: The DUMP bit is set to ‘1’ when the V
Set the appropriate mask bit in the GMASK register to detect the general faults. See Table 8.
Table 5. Left-Channel Fault Register Format
SVDDL: The SVDDL bit is set to ‘1’ when a short to V
SGNDL: The SGNDL bit is set to ‘1’ when a short to GND is detected on the left channel.
LIMITL: The LIMITL bit is set to ‘1’ when the current-limit threshold is tripped for left output.
OFFSETL: The OFFSETL bit is set to ‘1’ when excessive offset is detected on the left-channel output.
OPENL: The OPENL bit is set to ‘1’ when an open load is detected on the left channel.
Set the appropriate mask bit in the LMASK register to detect the faults on the left channel. See Table 9.
When any bit of the LFAULT register is high, the FLAG output is low.
Table 6. Right-Channel Fault Register Format
SVDDR: The SVDDR bit is set to ‘1’ when a short to V
SGNDR: The SGNDR bit is set to ‘1’ when a short to GND is detected on the right channel.
LIMITR: The LIMITR bit is set to ‘1’ when the current-limit threshold is tripped for right output.
OFFSETR: The OFFSETR bit is set to ‘1’ when excessive offset is detected on the right-channel output.
OPENR: The OPENR bit is set to ‘1’ when an open load is detected on the right channel.
Set the appropriate mask bit in the RMASK register to detect the faults on the right channel. See Table 10.
When any bit of the RFAULT register is high, the FLAG output is pulled low.
General Fault
Fault Register
Right-Channel
Fault Register
Left-Channel
FUNCTION
FUNCTION
FUNCTION
Register
CODE (HEX)
ADDRESS
ADDRESS
______________________________________________________________________________________
ADDRESS
CODE
(HEX)
CODE
0x03
(HEX)
0x02
0x04
Dual Automotive, Audio Line Drivers
SVDDL
SVDDR
D7
D7
D7
x
with I
TWARN
SGNDR
SGNDL
D6
D6
D6
DD
voltage exceeds the overvoltage threshold.
TSHDN
LIMITL
LIMITR
D5
DD
2
D5
DD
D5
C Control and Diagnostic
is detected on the left channel.
is detected on the right channel.
REGISTER DATA
REGISTER DATA
REGISTER DATA
DUMP
D4
D4
D4
x
x
OFFSETR
OFFSETL
D3
x
D3
D3
D2
x
OPENL
OPENR
D2
D2
D1
x
Right-Channel Faults
D1
D1
x
x
Left-Channel Faults
D0
x
D0
D0
General Faults
x
x
POR STATE
POR STATE
POR STATE
(HEX)
(HEX)
0x00
(HEX)
0x00
0x00
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