EP2AGX65DF25I5 Altera Corporation, EP2AGX65DF25I5 Datasheet - Page 83

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EP2AGX65DF25I5

Manufacturer Part Number
EP2AGX65DF25I5
Description
IC ARRIA II GX FPGA 65K 572FBGA
Manufacturer
Altera Corporation
Series
Arria II GXr
Datasheet

Specifications of EP2AGX65DF25I5

Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5371904
Number Of I /o
252
Number Of Gates
-
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
572-FBGA
Lead Free Status
Contains lead
Rohs Status
RoHS non-compliant

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0
Chapter 1: Device Datasheet for Arria II Devices
Glossary
Table 1–68. Glossary (Part 2 of 4)
December 2011 Altera Corporation
Letter
M,
G,
H,
N,
O,
Q,
K,
L,
I,
P
R
J
J
JTAG Timing
Specifications
PLL
Specifications
R
L
Subject
High-speed I/O block: Deserialization factor (width of parallel data bus).
JTAG Timing Specifications:
PLL Specification parameters:
Diagram of PLL Specifications (1)
Note:
(1) CoreClock can only be fed by dedicated clock input pins or PLL outputs.
Receiver differential input discrete resistor (external to the Arria II device).
TMS
TDO
TCK
TDI
Core Clock
Key
CLK
Reconfigurable in User Mode
t
JCH
t
JPZX
t
JCP
t
JCL
Switchover
f
IN
External Feedback
N
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
f
INPFD
t
Definitions
JPCO
PFD
t
JPSU
M
CP
LF
VCO
K
t
JPH
f
VCO
Counters
t
C0..C9
JPXZ
CLKOUT Pins
f
OUT_EXT
f
OUT
GCLK
RCLK
1–75

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