STM8L152C8 STMicroelectronics, STM8L152C8 Datasheet - Page 51
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STM8L152C8
Manufacturer Part Number
STM8L152C8
Description
STM8L-Ultra Low Power-8 bits Microcontrollers
Manufacturer
STMicroelectronics
Datasheet
1.STM8L151R6.pdf
(126 pages)
Specifications of STM8L152C8
Operating Power Supply
1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
Temp. Range
−40 to 85, 105 or 125 °C
5 Low Power Modes
Wait, Low power run (5.9 μA), Low power wait (3 μA), Active-halt with full RTC (1.4 μA), Halt (400 nA)
Dynamic Power Consumption
200 μA/MHz+330 μA
Ultra Low Leakage Per I/0
50 nA
Max Freq
16 MHz, 16 CISC MIPS peak
Lcd
8x40 or 4x44 w/ step-up converter
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STM8L15xx8, STM8L15xR6
Table 9.
0x00 538A to
to 0x00 538F
to 0x00 539B
to 0x00 539F
0x00 5386 to
0x00 5391 to
0x00 5396 to
0x00 538B
0x00 538C
0x00 538D
0x00 538E
0x00 539A
0x00 539C
0x00 539D
0x00 5380
0x00 5381
0x00 5382
0x00 5383
0x00 5384
0x00 5385
0x00 5387
0x00 5388
0x00 5389
0x00 5390
0x00 5393
0x00 5394
0x00 5395
0x00 5397
0x00 5398
0x00 5399
Address
General hardware register map (continued)
Block
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC_CH1RDHRH
DAC_CH2RDHRH
DAC_CH1RDHRL
DAC_CH1LDHRH
DAC_CH2RDHRL
DAC_CH2LDHRH
DAC_CH1LDHRL
DAC_CH2LDHRL
DAC_CH1DHR8
DAC_CH2DHR8
Register label
DAC_CH1CR1
DAC_CH1CR2
DAC_CH2CR1
DAC_CH2CR2
DAC_SWTRIG
DAC_SR
Doc ID 17943 Rev 4
Reserved area (2 bytes)
Reserved area (2 bytes)
Reserved area (2 bytes)
Reserved area (3 bytes)
Reserved area (2 bytes)
Reserved area (2 bytes)
Reserved area (3 bytes)
DAC channel 1 8-bit data holding register
DAC channel 2 8-bit data holding register
DAC channel 1 right aligned data holding
DAC channel 1 right aligned data holding
DAC channel 2 right aligned data holding
DAC channel 2 right aligned data holding
DAC channel 1 left aligned data holding
DAC channel 1 left aligned data holding
DAC channel 2 left aligned data holding
DAC channel 2 left aligned data holding
DAC channel 1 control register 1
DAC channel 1 control register 2
DAC channel 2 control register 1
DAC channel 2 control register 2
DAC software trigger register
DAC status register
Register name
register high
register high
register high
register high
register low
register low
register low
register low
Memory and register map
status
Reset
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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