STM8L101F3 STMicroelectronics, STM8L101F3 Datasheet - Page 25
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STM8L101F3
Manufacturer Part Number
STM8L101F3
Description
Ultra Low Power MCUs, STM8L
Manufacturer
STMicroelectronics
Datasheet
1.STM8L101G2.pdf
(81 pages)
Specifications of STM8L101F3
Low Power Consumption (halt
0.3 μA, Active-halt
Temp. Range
-40 to 85 °C and 125 °C
Three Low Power Modes
Wait, Active-halt, Halt
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STM8L101xx
Table 7.
0x00 50DF
0x00 50A0
0x00 50A1
0x00 50A2
0x00 50A3
0x00 50A4
0x00 50A5
0x00 50A6
0x00 50A7
0x00 50A8
0x00 50AF
0x00 50B0
0x00 50B1
0x00 50B2
0x00 50BF
0x00 50C0
0x00 50C1
0x00 50C2
0x00 50C3
0x00 50C4
0x00 50C5
0x00 50C6
0x00 5050
0x00 5051
0x00 5052
0x00 5053
0x00 5054
0x00 5055
0x00 509F
Address
to
to
to
to
to
General hardware register map
ITC-EXTI
Block
Flash
WFE
RST
CLK
FLASH _IAPSR
FLASH _PUKR
FLASH _DUKR
CLK_PCKENR
Register label
CLK_CKDIVR
FLASH_CR1
FLASH_CR2
EXTI_CONF
CLK_CCOR
EXTI_CR1
EXTI_CR2
EXTI_CR3
EXTI_SR1
EXTI_SR2
WFE_CR1
WFE_CR2
RST_CR
RST_SR
Doc ID 15275 Rev 11
Reserved area (75 bytes)
Reserved area (14 bytes)
Reserved area (25 bytes)
Reserved area (8 bytes)
Flash in-application programming status
Flash Program memory unprotection
External interrupt port select register
Data EEPROM unprotection register
External interrupt control register 1
External interrupt control register 2
External interrupt control register 3
External interrupt status register 1
External interrupt status register 2
Configurable clock control register
Reserved area (2 bytes)
Peripheral clock gating register
Reserved (1 byte)
Flash control register 1
Flash control register 2
WFE control register 1
WFE control register 2
Reset control register
Clock divider register
Reset status register
Register name
register
register
Memory and register map
status
Reset
0xX0
0x01
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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