STR911FAW42 STMicroelectronics, STR911FAW42 Datasheet - Page 75

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STR911FAW42

Manufacturer Part Number
STR911FAW42
Description
32-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STR911FAW42

Arm966e-s Risc Core
Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)

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STR91xFAxxx
7.10
Table 31.
1. Guaranteed by characterization, not tested in production.
2. Input pins are 5V tolerant, max input voltage is 5.5V
3. Guaranteed by design, not tested in production.
4. TAMPER_IN pin and STR9 general inputs have no built-in hysteresis.
Symbol
V
V
V
V
V
HYS
OH
OL
IH
IL
I/O characteristics
V
I/O characteristics
Input high level
Input low level
Input hysteresis
Schmitt trigger
Output high level
High current pins
Output high level
Standard current pins
Output high level
JTAG JTDO pin
Output low level
High current pins
Output low level
Standard current pins
Output low level
JTAG JTDO pin
DDQ
= 2.7 - 3.6 V, V
Parameter
DD
General inputs
RESET and TCK inputs
TAMPER_IN input
mode)
TAMPER_IN input
(Standby mode)
General inputs
RESET and TCK inputs
TAMPER_IN input
(Run mode)
TAMPER_IN input
(Standby mode)
General inputs
I/O ports 3 and 6:
Push-Pull, I
I/O ports 0,1,2,4,5,7,8,9:
Push-Pull, I
I/O ports 3 and 6:
Push-Pull, I
I/O ports 0,1,2,4,5,7,8,9:
Push-Pull, I
I
I
= 1.65 - 2 V, T
OH
OL
=100 µA
= -100 µA
Test conditions
Doc ID 13495 Rev 6
OH
OH
OL
OL
(1)
(1)
(4)
= 8mA
= 4mA
= 8mA
= 4mA
A
(3)
(3)
(3)
(3)
= -40 / 85 °C unless otherwise specified.
(Run
(1)
(1)
V
V
V
0.8 V
V
V
DDQ
DDQ
DDQ
DDQ
Min
BAT
2.0
DDQ
-0.7
-0.7
-0.1
/2
/2
Value
Electrical characteristics
Typ
0.2 V
V
V
Max
DDQ
BAT
0.8
0.4
0.4
0.1
(2)
0
DDQ
/2
/2
Unit
75/102
V
V
V
V

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