DS1265AB Maxim, DS1265AB Datasheet - Page 2

• Manufacturer Part Number: DS1265AB
• Description: The DS1265 8M Nonvolatile SRAMs are 8,388,608-bit, fully static nonvolatile SRAMs organized as 1,048,576 words by 8 bits
• Manufacturer: Maxim

READ MODE
The DS1265 devices execute a read cycle whenever
Enable) and
(A
eight data output drivers within t
that
satisfied, then data access must be measured from the later-occurring signal (
parameter is either t
WRITE MODE
The DS1265 devices execute a write cycle whenever
inputs are stable. The later-occurring falling edge of
The write cycle is terminated by the earlier rising edge of
valid throughout the write cycle.
before another cycle can be initiated. The
cycles to avoid bus contention. However, if the output drivers are enabled (
will disable the outputs in t
DATA RETENTION MODE
The DS1265AB provides full functional capability for V
4.5 volts. The DS1265Y provides full functional capability for V
protects by 4.25 volts. Data is maintained in the absence of V
The nonvolatile static RAMs constantly monitor V
automatically write protect themselves, all inputs become don’t care, and all outputs become high-
impedance. As V
energy source to RAM to retain data. During power-up, when V
the power switching circuit connects external V
Normal RAM operation can resume after V
DS1265Y.
FRESHNESS SEAL
Each DS1265 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When V
energy source is enabled for battery backup operation.
0
- A
CE
19
and
) defines which of the 1,048,576 bytes of data is accessed. Valid data will be available to the
OE
OE
(Output Enable) are active (low). The unique address specified by the 20 address inputs
CC
(Output Enable) access times are also satisfied. If
CO
falls below approximately 3.0 volts, a power switching circuit connects the lithium
for
CE
ODW
or t
from its falling edge.
ACC
OE
WE
for
(Access Time) after the last address input signal is stable, providing
must return to the high state for a minimum recovery time (t
OE
OE
CC
rather than t
CC
exceeds 4.75 volts for the DS1265AB and 4.5 volts for the
control signal should be kept inactive (high) during write
is first applied at a level greater than V
CC
2 of 8
CC
to RAM and disconnects the lithium energy source.
CE
WE
. Should the supply voltage decay, the NV SRAMs
WE
ACC
or
CC
(Write Enable) is inactive (high) and
.
and
WE
greater than 4.75 volts and write protects by
CE
CC
will determine the start of the write cycle.
CE
or
without any additional support circuitry.
CC
WE
signals are active (low) after address
CC
rises above approximately 3.0 volts,
OE
. All address inputs must be kept
greater than 4.5 volts and write
and
CE
CE
and
CE
or
access times are not
OE
OE
) and the limiting
active) then
TP
, the lithium
DS1265Y/AB
CE
(Chip
WE
WR
)