DS1220AD Maxim, DS1220AD Datasheet

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DS1220AD

Manufacturer Part Number
DS1220AD
Description
The DS1220AB and DS1220AD 16k Nonvolatile (NV) SRAMs are 16,384-bit, fully static, NV SRAMs organized as 2048 words by 8 bits
Manufacturer
Maxim
Datasheet

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FEATURES
 10 years minimum data retention in the
 Data is automatically protected during power
 Directly replaces 2k x 8 volatile static RAM
 Unlimited write cycles
 Low-power CMOS
 JEDEC standard 24-pin DIP package
 Read and write access times of 100 ns
 Lithium energy source is electrically
 Full ±10% V
 Optional ±5% V
 Optional industrial temperature range of
DESCRIPTION
The DS1220AB and DS1220AD 16k Nonvolatile SRAMs are 16,384-bit, fully static, nonvolatile SRAMs
organized as 2048 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and
control circuitry which constantly monitors V
occurs, the lithium energy source is automatically switched on and write protection is unconditionally
enabled to prevent data corruption. The NV SRAMs can be used in place of existing 2k x 8 SRAMs
directly conforming to the popular bytewide 24-pin DIP standard. The devices also match the pinout of
the 2716 EPROM and the 2816 EEPROM, allowing direct substitution while enhancing performance.
There is no limit on the number of write cycles that can be executed and no additional support circuitry is
required for microprocessor interfacing.
www.maxim-ic.com
19-5580; Rev 10/10
absence of external power
loss
or EEPROM
disconnected to retain freshness until power
is applied for the first time
(DS1220AB)
-40°C to +85°C, designated IND
CC
operating range (DS1220AD)
CC
operating range
CC
for an out-of-tolerance condition. When such a condition
1 of 8
PIN ASSIGNMENT
PIN DESCRIPTION
A0-A10
DQ0-DQ7
V
GND
CE
WE
OE
CC
24-Pin ENCAPSULATED PACKAGE
16k Nonvolatile SRAM
GND
DQ0
DQ1
DQ2
A7
A6
A5
A4
A3
A2
A1
A0
720-mil EXTENDED
1
2
3
4
5
6
7
8
9
10
11
12
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
- Output Enable
- Power (+5V)
- Ground
DS1220AB/AD
24
23
22
21
20
19
18
17
16
15
14
13
VCC
WE
A8
A9
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3

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DS1220AD Summary of contents

Page 1

... Optional industrial temperature range of -40°C to +85°C, designated IND DESCRIPTION The DS1220AB and DS1220AD 16k Nonvolatile SRAMs are 16,384-bit, fully static, nonvolatile SRAMs organized as 2048 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which constantly monitors V occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption ...

Page 2

... OE WRITE MODE The DS1220AB and DS1220AD execute a write cycle whenever the WE and CE signals are active (low) after address inputs are stable. The latter occurring falling edge will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge All address inputs must be kept valid throughout the write cycle ...

Page 3

... Write Protection Voltage (DS1220AD) CAPACITANCE PARAMETER Input Capacitance Input/Output Capacitance SYMBOL MIN TYP MAX UNITS V 4.75 5.0 5. 4.50 5 0.0 +0 ± 5% for DS1220AB ± 10% for DS1220AD SYMBOL MIN TYP MAX UNITS -1.0 I +1.0 IL -1 5.0 10.0 CCS1 I 3.0 5.0 CCS2 I 75 CC01 ...

Page 4

... Output Hold from Address Change Write Cycle Time Write Pulse Width Address Setup Time Write Recovery Time Output High from WE Output Active from WE Data Setup Time Data Hold Time = 5.0V ± 5% for DS1220AB 5.0V ± 10% for DS1220AD DS1220AB-100 SYMBOL DS1220AD-100 MIN MAX t 100 RC t ...

Page 5

READ CYCLE SEE NOTE 1 WRITE CYCLE 1 SEE NOTES AND 12 WRITE CYCLE 2 SEE NOTES AND DS1220AB/AD ...

Page 6

POWER-DOWN/POWER-UP CONDITION SEE NOTE 11 POWER-DOWN/POWER-UP TIMING PARAMETER V Fail Detect to and slew from slew from Valid to and Inactive ...

Page 7

... low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high-impedance state during this period. 9. Each DS1220AB and each DS1220AD has a built-in switch that disconnects the lithium source until V is first applied by the user. The expected t ...

Page 8

... Added package information table; removed the DIP module package 121907 drawing and dimension table Updated the storage and soldering temperature information in the Absolute Maximum Ratings section, removed the unused AC timing 10/10 specs in the AC Electrical Characteristics table, updated the Ordering Information table, updated the Package Information table ...

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