71M6543G Maxim, 71M6543G Datasheet - Page 94

• Manufacturer Part Number: 71M6543G
• Description: The 71M6543F/71M6543H are Teridian's 4th-generation polyphase metering system-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power real-time clock (RTC) with digital temperature compensation, flash memory, and LCD driver
• Manufacturer: Maxim

71M6543F/H and 71M6543G/GH Data Sheet
behavior of each individual part across industrial temperatures (see
the 71M6543H).
4.6
I
SEGDIO3, as shown in
Pullup resistors of roughly 10 kΩ to V3P3D (to ensure operation in BRN mode) should be used for both
SDCK and SDATA signals. The DIO_EEX (I/O RAM 0x2456[7:6]) field must be set to 01 in order to convert
the DIO pins SEGDIO2 and SEGDIO3 to I
4.7
µWire EEPROMs and other compatible devices should be connected to the DIO pins SEGDIO2 and
SEGDIO3, as described in
4.8
The UART0 RX pin should be pulled down by a 10 kΩ resistor and additionally protected by a 100 pF
ceramic capacitor, as shown in
4.9
The OPT_TX and OPT_RX pins can be used for a regular serial interface (by connecting a RS_232
transceiver for example), or they can be used to directly operate optical components (for example, an
infrared diode and phototransistor implementing a FLAG interface).
94
2
C EEPROMs or other I
Connecting I
Connecting Three-Wire EEPROMs
UART0 (TX/RX)
Optical Interface (UART1)
The resulting tracking of the reference VREF voltage is within ±10 ppm/°C.
Figure
2
2
C compatible devices should be connected to the DIO pins SEGDIO2 and
C EEPROMs
2.5.11 EEPROM Interface
© 2008–2011 Teridian Semiconductor Corporation
33.
Figure
71M6543
Figure 33: I
Figure 34: Connections for UART0
71M6543
34.
TX
2
DIO2
RX
DIO3
C pins SCL and SDATA.
2
10 k Ω
C EEPROM Connection
100 pF
on page 66.
10 k Ω
10 k Ω
EEPROM
SDCK
SDATA
V3P3D
Figure 35
4.5.3 Temperature Coefficients for
TX
RX
shows the basic connections
v1.2