73S1210F Maxim, 73S1210F Datasheet - Page 39
73S1210F
Manufacturer Part Number
73S1210F
Description
The 73S1210F is a versatile and economical CMOS system-on-chip (SoC) device intended for smart card reader applications
Manufacturer
Maxim
Datasheet
1.73S1210F.pdf
(126 pages)
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DS_1210F_001
Interrupt Priority 1 Register (IP1): 0xB9 0x00
1.7.5.6
Table 32 shows the interrupts with their associated flags and vector addresses.
Rev. 1.4
Interrupt Sources and Vectors
Interrupt Request Flag Description
N/A
IE0
TF0
IE1
TF1
RI0/TI0
RI1/TI1
IEX2
IEX3
IEX4
IEX5
IEX6
MSB
–
–
IP1.x
Table 31: Interrupt Polling Sequence
0
0
1
1
IP1.5
Serial channel 1 interrupt
Serial channel 0 interrupt
Chip Reset
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial channel 0 interrupt
Serial channel 1 interrupt
External interrupt 2
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
Table 32: Interrupt Vectors
Table 29: The IP1 Register
Table 30: Priority Levels
External interrupt 0
External interrupt 2
External interrupt 1
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
Timer 0 interrupt
Timer 1 interrupt
IP1.4
IP0.x
0
1
0
1
IP1.3
Priority Level
Level0 (lowest)
Level1
Level2
Level3 (highest)
IP1.2
Interrupt Vector Address
IP1.1
0x000B
0x001B
0x004B
0x005B
0x006B
0x0000
0x0003
0x0013
0x0023
0x0083
0x0053
0x0063
73S1210F Data Sheet
IP1.0
LSB
39
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