DS8007A Maxim, DS8007A Datasheet - Page 31

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DS8007A

Manufacturer Part Number
DS8007A
Description
The DS8007A multiprotocol dual smart card interface is an automotive grade, low-cost, dual smart card reader interface supporting all ISO 7816, EMV™, and GSM11-11 requirements
Manufacturer
Maxim
Datasheet

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Table 3. Timeout Counter Configurations (continued)
TOC VALUE
7Ch
E5h
71h
75h
85h
F1h
F5h
______________________________________________________________________________________
Multiprotocol Dual Smart Card Interface
Start Bit/Autostop
Start Bit/Autostop
TOR3
Start Bit (XMT)
Start Bit (XMT)
Software
Stopped
Start Bit
Start Bit
(RCV);
(RCV);
TOR2
Start Bit
Bit/Autoreload
Bit/Autoreload
Bit/Autoreload
Bit/Autoreload
Bit/Autostop
Bit/Autostop
Bit/Autostop
Stopped
Stopped
(RCV);
(RCV);
(RCV);
TOR1
(XMT)
(XMT)
(XMT)
Start
Start
Start
Start
Start
Start
Start
Counter 1 is stopped. Counters 3 and 2 form a 16-bit counter
operating in start bit mode for both transmission and reception.
TOR3 and TOR2 registers can be changed during the count, the
current count is not affected, and the values are taken into account
at the next START bit detected on the I/Ox pin. Setting TOC = 00h
stops the counters.
Counter 1 is an 8-bit counter in start-bit/autoreload mode for both
transmission and reception; counters 3 and 2 form a 16-bit counter
operating in start-bit mode for both transmission and reception. The
TOR1 register is not allowed to change during the count. TOR3,
TOR2 registers can be changed during the count, the current count
is not affected, and the values are taken into account at the next
START bit detected on the I/Ox pin. Setting TOC = 00h stops the
counters.
Counters 1/2/3 form a 24-bit counter operating in start-bit mode in
both transmission and reception. TOR3, TOR2 and TOR1 registers
can be changed during the count, the current count is not affected,
and the value is taken into account at the next START bit detected
on the I/Ox pin. Setting TOC = 00h stops the counter.
Counters 3 and 2 are stopped. Counter 1 is operated in start-
bit/autostop mode in reception and is stopped at the end of the
12th ETU following the first received START bit detected on the
I/Ox pin unless the terminal count is reached first. Counter 1
operates in start-bit/autoreload mode in transmission.
Counters 3 and 2 form a 16-bit counter operating in software mode.
The counters are stopped by setting TOC = 05h before reloading
new values in TOR3 and TOR2 registers. Counter 1 is operated in
autostop mode in reception and is stopped at the end of the 12th
ETU following the first received START bit detected on the I/Ox pin
unless the terminal count is reached first. Counter 1 is operated in
start-bit/autoreload mode in transmission.
Counter 1 is stopped. Counters 3 and 2 form a 16-bit counter. The
16-bit counter is operated in start-bit/auto-stop mode in reception
and is stopped at the end of the 12th ETU following the first
received START bit detected on the I/Ox pin unless the terminal
count is reached first; and the 16-bit counter is operated in start-bit
mode in transmission.
Counter 1 is an 8-bit counter operating in start-bit/autostop mode in
reception and is stopped at the end of the 12th ETU following the
first received START bit detected on the I/Ox pin unless the
terminal count is reached first; and the 8-bit counter is operated in
start-bit/autoreload mode in transmission. Counters 3 and 2 form a
16-bit counter operating in start-bit mode for transmission but
operate in start-bit/autostop mode in reception. Counters 3 and 2
are stopped at the end of the 12th ETU following the first received
START bit detected on the I/Ox pin unless the terminal count is
reached first; the counters are stopped by setting TOC = 00h.
DESCRIPTION
31

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