MAX7365 Maxim, MAX7365 Datasheet - Page 10

• Manufacturer Part Number: MAX7365
• Description: The MAX7365 is an I²C-interfaced peripheral that provides microprocessors with management of up to 56 key switches
• Manufacturer: Maxim

Table 3. 4 x 4 Keyboard Matrix
Configuration with GPI
Keypresses initiate autowake and the device goes into
operating mode. Keypresses that autowake the device
are not lost. When a key is pressed while the device is in
sleep mode, all analog circuitry, including switch-matrix
current sources, turn on in 2ms. The initial key needs to
be pressed for 2ms plus the debounce time to be stored
in the FIFO. Write a 0 to bit D1 in the Configuration regis-
ter (0x01) to disable autowake.
The FIFO overflow status occurs when the FIFO is full
(16 bytes) and additional events occur. If key release is
disabled, then the FIFO overflow status occurs when the
FIFO is full and not upon additional key events. When the
FIFO is overflowed, the first byte read from the FIFO buf-
fer is the overflow byte (0x7F). The order of the original 16
bytes of event data is preserved, but further events could
be lost. When the FIFO is full, if the 18th key event is a key
release, then the FIFO overflow status is removed.
The device has five GPIO ports. The ports can be used
as logic inputs or logic outputs. Each GPIO port features
pullup/pulldown resistors when configured as open-drain
outputs. Also, the port is configurable with a high-side
open-drain output.
The COLs (GPI[6:0]) and ROWs (GPI[14:7]) are also
configurable as GPIs when not used for the key-switch
matrix. When the device is configured with C columns
and R rows for the key-switch matrix, assuming N is the
larger number between R and C, then COL[6:N+1] and
ROW[7:N+1] are configured as GPI ports. As an exam-
ple, for a 4 x 4 matrix, COL6/COL5 and ROW7, ROW6,
ROWS
0
1
2
3
4
5
6
7
0
4 x 4 keyboard
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1
matrix
GND
GPI
GPI
GPI
2
3
Key-Switch Controller with GPIO Ports
COLUMNS
Key-Switch Autowake
GND
—
—
—
—
4
FIFO Overflow
GPI
GPIO Ports
—
—
—
—
5
GPI
—
—
—
—
6
1MHz I
Table 4. 3 x 4 Keyboard Matrix
Configuration with GPI
and ROW5 are configured as GPIs, as shown in
Unused GPIs and pins configured neither as key-switch
nor GPI should be connected to GND.
ured as a 3 x 4 matrix, shows ROW4 and ROW3 con-
nected to GND, since they cannot be configured as GPI.
This register configures the pins as an input or an output
port. GPIO Direction register bits D[4:0] correspond with
GPIO4–GPIO0
0 to configure it as an input and 1 to configure it as an
output.
When the port is initially programmed as an input, there
is a delay of one debounce period prior to detecting
a transition on the input port. This is to prevent a false
interrupt from occurring when changing a port from an
output to an input.
This register configures the pin as an open-drain or
push-pull output. GPO Output Mode register bits D[4:0]
correspond with GPIO4–GPIO0
responding bit to 0 to configure the output mode as open
drain and 1 to configure the output mode as push-pull.
The GPIs LSB and MSB Port Value registers contain the
debounced input data for all the GPIOs for GPI[7:0] and
GPI[14:8], respectively
one debounce period delay prior to detecting a transi-
tion on the input port. This prevents a false interrupt from
occurring when changing a port from an output to an
input. These registers report the state of all input ports,
regardless of any interrupt mask settings.
ROWS
0
1
2
3
4
5
6
7
2
0
3 x 4 keyboard
C-Interfaced 8 x 7
(Table
GPIs LSB, MSB Port Value Registers
1
matrix
GND
GND
GPI
GPI
GPI
GPO Output Mode Register (0x32)
13). Set the corresponding bit to
2
(Table 15
GPIO Direction Register (0x31)
3
COLUMNS
(0x33, 0x34) (Read Only)
(Table
and
GND
—
—
—
—
—
MAX7365
4
Table
14). Set the cor-
Table
GPI
—
—
—
—
—
5
16). There is
4, config-
Table
GPI
—
—
—
—
—
6
3.