MAX7370 Maxim, MAX7370 Datasheet - Page 14

• Manufacturer Part Number: MAX7370
• Description: The MAX7370 I²C-interfaced peripheral provides microprocessors with management of up to 64 key switches, with optional GPIO and PWM-controlled LED drivers
• Manufacturer: Maxim

with I
• Put the part into sleep mode to cause all ports to fade
Each port has an individual PWM ratio register. The value
stored in this register configures the number of cycles
out of 255 that the output is sinking current (LED is on).
Setting a value of 0xFF in an individual intensity register
sets the output to continuously sink current (always on).
Conversely, setting a value of 0x00 in an individual inten-
sity register sets the output in a high-impedance state
(always off).
For applications requiring multiple ports to have the
same intensity, the common PWM ratio intensity setting
can be used in lieu of the individual intensity setting. To
use the common intensity setting, program bit D5 of the
corresponding port’s configuration register to logic-high.
Setting a port to use the common PWM ratio setting
copies the value of the common intensity register into
the individual intensity register at the beginning of each
PWM cycle. This allows an output port to be seamlessly
changed from common intensity to individual intensity
with no interruption in the PWM cycle.
Outputs are configured to sink a constant current of either
10mA or 20mA during the period of time when the output
is on. The setting in the individual GPIO constant-current
setting register (0x43) controls the value of the current.
Figure 1. Two-Wire Serial Interface Timing Details
out. Changing an individual PWM intensity during
fade out automatically cancels that port’s fade and
immediately turns off.
8 x 8 Key-Switch Controller and LED Driver/GPIOs
SDA
SCL
t
HD, STA
2
C Interface and High Level of ESD Protection
CONDITION
START
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t
LOW
t
R
t
HIGH
t
SU, DAT
t
F
t
HD, DAT
LED PWM
t
SU, STA
START CONDITION
Each LED driver-supported port has its own blink-control
settings through registers 0x54 to 0x57. See
The blink period ranges from 0 (blink disabled) to 4.096s.
Settable blink duty cycles range from 6.25% to 50%. All
blink periods start at the same PWM cycle for synchro-
nized blinking between multiple ports.
Each port has its own counter to generate blink timing.
The blink counter can be programmed to cause the out-
put to gate off and on at a programmable rate. The blink
period can be set to 256ms, 512ms, 1.024s, 2.048s, or
4.096s using D[4:2] of the port’s individual configuration
register. The percentage of time that the LED is on for
one blink cycle is set to 50%, 25%, 12.5%, or 6.25% by
D[1:0] of the individual configuration register.
Three possible sources generate INT: key-switch FIFO
level/debounce cycle settings, I
configured as inputs (registers 0x03, 0x48, 0x5A, and
0x5B). Read the respective data/status registers for each
type of interrupt to clear INT. If multiple sources generate
the interrupt, all the related status registers must be read
to clear INT.
Figure 1
REPEATED
t
t
HD, STA
R
shows the two-wire serial interface timing details.
t
SU, STO
t
t
F
F, TX
CONDITION
Serial Interface
STOP
2
C timeout, or GPIOs
MAX7370
t
BUF
CONDITION
START
Interrupts
LED Blink
Table
30.