MAX7358 Maxim, MAX7358 Datasheet - Page 13

• Manufacturer Part Number: MAX7358
• Description: The MAX7356/MAX7357/MAX7358 8-channel I²C switches/multiplexers expand the main I²C bus to any combination of 8 extended I²C buses
• Manufacturer: Maxim

Only the switch control register can be accessed through
an I
the switch control register. The last data byte in an I
write command is retained by the switch control register.
Only the MAX7357 or MAX7358 I
required to gain access to its registers. A typical I
command to communicate with the MAX7357 or
MAX7358 starts with its device address and is followed
directly by data bytes. Internal register addresses are
not used in an I
For enhanced mode, all registers are accessed in
sequence starting with the switch control register and
follows the order defined by internal register addresses
as shown in Table 2. Internal register addresses are
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, and 0x06 for
switch control, configuration, flush-out sequence, lock-
up indication, first and second bytes of the traffic prior
to lock-up, and preconnection fault registers, respec-
tively. When writing data to the register(s), addressing
starts with address 0x00 and goes one higher in each
subsequent byte and comes back to 0x00 again after
0x02 since the next four higher addressed registers are
read only. Read access also starts with the internal reg-
ister address 0x00 and goes one higher in each subse-
quent byte and comes back to 0x00 again after 0x06.
Table 4. Switch Control Register Channel Selection
X = Don’t care.
B7
2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
1-to-8 I
Lock-Up Detection, Isolation, and Notification
C write or read command. All data bytes are for
B6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
2
C write or read command.
______________________________________________________________________________________
2
B5
Register Access Protocol
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
C Bus Switches/Multiplexers with Bus
(MAX7357/MAX7358)
B4
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
2
C device address is
B3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
B2
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
2
2
C
C
For basic mode, only the switch control register can be
accessed through an I
data bytes are for the switch control register. The last
data byte in an I
switch control register. Incomplete bytes are ignored.
The switch control register (Figure 8) selects which
channels will be connected to the main I
register can be written and read through the main I
bus. The POR value for the switch control register is
0x00—all switches disconnected.
A SC_/SD_ downstream pair, or channel, is selected by
the contents of the switch control register. All bits of the
control byte are used to determine which channel is to
Figure 8. Switch Control Register
B1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
B0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
CHANNEL SELECTION BITS (READ/WRITE)
0
1
B7
B6
Channel 0 disabled
Channel 0 enabled
Channel 1 disabled
Channel 1 enabled
Channel 2 disabled
Channel 2 enabled
Channel 3 disabled
Channel 3 enabled
Channel 4 disabled
Channel 4 enabled
Channel 5 disabled
Channel 5 enabled
Channel 6 disabled
Channel 6 enabled
Channel 7 disabled
Channel 7 enabled
2
B5
C write command is retained by the
B4
2
B3
C write or read command. All
Switch Control Register
B2
COMMAND
B1
B0
CHANNEL 0
CHANNEL 1
CHANNEL 2
CHANNEL 3
CHANNEL 4
CHANNEL 5
CHANNEL 6
CHANNEL 7
2
C bus. This
13
2
C